Vashchenko vladislav (69 resultados)

Condición: New. This is a Brand-new US Edition. This Item may be shipped from US or any other country as we have multiple locations worldwide.

Condición: New.

Condición: New.

Condición: New.

HRD. Condición: New. New Book. Shipped from UK. Established seller since 2000.

Condición: As New. Unread book in perfect condition.

HRD. Condición: New. New Book. Shipped from UK. Established seller since 2000.

Hardcover. Condición: New. Brand new book, sourced directly from publisher. Dispatch time is 24-48 hours from our warehouse. Book will be sent in robust, secure packaging to ensure it reaches you securely.

Condición: New. In English.

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Condición: As New. Unread book in perfect condition.

Condición: New. pp. 338 Softcover reprint of the original 1st ed. 2014 edition NO-PA16APR2015-KAP.

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Condición: New. In English.

Condición: New.

Condición: New.

Hardback. Condición: New. 2014 ed. This book addresses key aspects of analog integrated circuits and systems design related to system level electrostatic discharge (ESD) protection.  It is an invaluable reference for anyone developing systems-on-chip (SoC) and systems-on-package (SoP), integrated with system-level ESD protection. The book focuses on both the design of semiconductor integrated circuit (IC) components with embedded, on-chip system level protection and IC-system co-design. The readers will be enabled to bring the system level ESD protection solutions to the level of integrated circuits, thereby reducing or completely eliminating the need for additional, discrete components on the printed circuit board (PCB) and meeting system-level ESD requirements. The authors take a systematic approach, based on IC-system ESD protection co-design. A detailed description of the available IC-level ESD testing methods is provided, together with a discussion of the correlation between IC-level and system-level ESD testing methods. The IC-level ESD protection design is demonstrated with representative case studies which are analyzed with various numerical simulations and ESD testing. The overall methodology for IC-system ESD co-design is presented as a step-by-step procedure that involves both ESD testing and numerical simulations.…

Condición: New. In English.

Taschenbuch. Condición: Neu. System Level ESD Protection | Vladislav Vashchenko (u. a.) | Taschenbuch | xviii | Englisch | 2016 | Springer | EAN 9783319348926 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu.…

Condición: New. pp. 480.

Condición: New. pp. 346.

Taschenbuch. Condición: Neu. Druck auf Anfrage Neuware - Printed after ordering - Since the beginning of semiconductor era in microelectronics the methodology of reliability assessment became a well established area. In most cases the reliability assessment involves statistical methods for safe operating area and long term re- ability parameters at the development of semiconductor processes, components and systems. At the same time in case of catastrophic failures at any development phase the major practical method is failure analysis (FA). However FA is mainly dealing with detection of consequences of some irreversible event that already happened. This book is focused on the most important and the less summarized reliability aspects. Among them: catastrophic failures, impact of local structural inhomo- neities, major principles of physical limitation of safe-operating area (SOA), physical mechanisms of the current instability, filamentation and conductivity modulation in particular device types and architectures. Specifically, the similar principles and regularities are discussed for elect- static discharge (ESD) protection devices, treating them as a particular case of pulsed power devices. Thus both the most intriguing applications and reliability problems in case of the discrete and the integrated components are covered in this book.…

Buch. Condición: Neu. Druck auf Anfrage Neuware - Printed after ordering - Since the beginning of semiconductor era in microelectronics the methodology of reliability assessment became a well established area. In most cases the reliability assessment involves statistical methods for safe operating area and long term re- ability parameters at the development of semiconductor processes, components and systems. At the same time in case of catastrophic failures at any development phase the major practical method is failure analysis (FA). However FA is mainly dealing with detection of consequences of some irreversible event that already happened. This book is focused on the most important and the less summarized reliability aspects. Among them: catastrophic failures, impact of local structural inhomo- neities, major principles of physical limitation of safe-operating area (SOA), physical mechanisms of the current instability, filamentation and conductivity modulation in particular device types and architectures. Specifically, the similar principles and regularities are discussed for elect- static discharge (ESD) protection devices, treating them as a particular case of pulsed power devices. Thus both the most intriguing applications and reliability problems in case of the discrete and the integrated components are covered in this book.…

Condición: New. Provides a systematic approach to on-chip ESD protection for system-level IC pinsDescribes a system-level co-design methodology, which uses external system level ESD protection components, together with on-chip ESD protection structureInclu.

Taschenbuch. Condición: Neu. Physical Limitations of Semiconductor Devices | Vladislav A. Vashchenko (u. a.) | Taschenbuch | xiii | Englisch | 2010 | Springer | EAN 9781441945051 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu. …

Condición: New. In English.

Condición: New. In English.

Condición: New.

Condición: New. pp. 480.