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Taschenbuch. Condición: Neu. Druck auf Anfrage Neuware - Printed after ordering - Architectures [Regular Papers].- Architectural Exploration of the ADRES Coarse-Grained Reconfigurable Array.- A Configurable Multi-ported Register File Architecture for Soft Processor Cores.- MT-ADRES: Multithreading on Coarse-Grained Reconfigurable Architecture.- Asynchronous ARM Processor Employing an Adaptive Pipeline Architecture.- Partially Reconfigurable Point-to-Point Interconnects in Virtex-II Pro FPGAs.- Systematic Customization of On-Chip Crossbar Interconnects.- Authentication of FPGA Bitstreams: Why and How.- Architectures [Short Papers].- Design of a Reversible PLD Architecture.- Designing Heterogeneous FPGAs with Multiple SBs.- Mapping Techniques and Tools [Regular Papers].- Partial Data Reuse for Windowing Computations: Performance Modeling for FPGA Implementations.- Optimized Generation of Memory Structure in Compiling Window Operations onto Reconfigurable Hardware.- Adapting and Automating XILINX's Partial Reconfiguration Flow for Multiple Module Implementations.- A Linear Complexity Algorithm for the Automatic Generation of Convex Multiple Input Multiple Output Instructions.- Evaluating Variable-Grain Logic Cells Using Heterogeneous Technology Mapping.- The Implementation of a Coarse-Grained Reconfigurable Architecture with Loop Self-pipelining.- Hardware/Software Codesign for Embedded Implementation of Neural Networks.- Synthesis of Regular Expressions Targeting FPGAs: Current Status and Open Issues.- Mapping Techniques and Tools [Short Papers].- About the Importance of Operation Grouping Procedures for Multiple Word-Length Architecture Optimizations.- Arithmetic [Regular Papers].- Switching Activity Models for Power Estimation in FPGA Multipliers.- Multiplication over on FPGA: A Survey.- A Parallel Version of the Itoh-Tsujii MultiplicativeInversion Algorithm.- A Fast Finite Field Multiplier.- Applications [Regular Papers].- Combining Flash Memory and FPGAs to Efficiently Implement a Massively Parallel Algorithm for Content-Based Image Retrieval.- Image Processing Architecture for Local Features Computation.- A Compact Shader for FPGA-Based Volume Rendering Accelerators.- Ubiquitous Evolvable Hardware System for Heart Disease Diagnosis Applications.- FPGA-Accelerated Molecular Dynamics Simulations: An Overview.- Reconfigurable Hardware Acceleration of Canonical Graph Labelling.- Reconfigurable Computing for Accelerating Protein Folding Simulations.- Reconfigurable Parallel Architecture for Genetic Algorithms: Application to the Synthesis of Digital Circuits.- Applications [Short Papers].- A Space Variant Mapping Architecture for Reliable Car Segmentation.- A Hardware SAT Solver Using Non-chronological Backtracking and Clause Recording Without Overheads.- Searching the Web with an FPGA Based Search Engine.- An Acceleration Method for Evolutionary Systems Based on Iterated Prisoner's Dilemma.- Real Time Architectures for Moving-Objects Tracking.- Reconfigurable Hardware Evolution Platform for a Spiking Neural Network Robotics Controller.- Multiple Sequence Alignment Using Reconfigurable Computing.- Simulation of the Dynamic Behavior of One-Dimensional Cellular Automata Using Reconfigurable Computing.…

Taschenbuch. Condición: Neu. Druck auf Anfrage Neuware - Printed after ordering - Transactions on HiPEAC aims at the timely dissemination of researchcontributions in computer architecture and compilation methods forhigh-performance embedded computer systems. Recognizing the convergenceof embedded and general-purpose computer systems, this journal publishes original research on systems targeted at specific computing tasks aswell as systems with broad application bases. The scope of the journaltherefore covers all aspects of computerarchitecture, code generationand compiler optimization methods of interest to researchers andpractitioners designing future embedded systems.This 5th issue contains extended versions of papers by the best paper award candidates of IC-SAMOS 2009 and the SAMOS 2009 Workshop, colocated events of the 9th International Symposium on Systems, Architectures, Modeling and Simulation, SAMOS 2009, held in Samos, Greece, in 2009. The 7 papers included in this volume were carefully reviewed and selected. The papers coverresearch on embedded processor hardware/software design and integration and present challenging research trends.…

Taschenbuch. Condición: Neu. Druck auf Anfrage Neuware - Printed after ordering - 1 The International Workshop on Recon gurable Computing (ARC) started in 2005 in Algarve, Portugal. The major motivation was to create an event where on-going research e orts as well as more elaborated, interesting and hi- quality work on applied recon gurable computing could be presented and d- cussed. Over the last couple of years recon gurable computing has become a we- known and established research area producing interesting as well as important results in both general and embedded computing systems. It is also getting more and more interest from industry which is attracted by the (design and development) exibility as well as the performance improvements that can be expected from this technology. As recon gurablecomputing has blurred the gap between software and hardware, some even speak of a radical new programming paradigm opening a new realm of unseen applications and opportunities. The logo of the ARC workshop is the Nonius, a measurement instrument used in the Portuguese period of discoveries that was invented by Pedro Nunes, a Portuguesemathematician. As the logo suggests,the main motto of ARC is to help to navigate the world of recon gurable computing. Driven by this motto, we hope ARC contributes to solid advances on recon gurable computing.…

Taschenbuch. Condición: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book constitutes the refereed proceedings of the 13th InternationalSymposium on Applied Reconfigurable Computing, ARC 2017, held in Delft, The Netherlands, in April 2017.The 17 full papers and 11 short papers presented in this volume were carefully reviewed andselected from 49 submissions. They are organized in topical sections on adaptive architectures, embedded computing and security, simulation and synthesis, design space exploration, fault tolerance, FGPA-based designs, neural neworks, and languages and estimation techniques.…

Taschenbuch. Condición: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book constitutes the thoroughly refereed conference proceedings of the 10th International Symposium on Reconfigurable Computing: Architectures, Tools and Applications, ARC 2014, held in Vilamoura, Portugal, in April 2014. The 16 revised full papers presented together with 17 short papers and 6 special session papers were carefully reviewed and selected from 57 submissions. The topics covered are applications; methods, frameworks and OS for debug, over-clocking, and relocation; memory architectures; methodologies and tools and architectures.…

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