Isbn: 9783844332636 - an improved markov random field design approach for digital circuits: introducing fault-tolerance with higher noise-immunity for the nano-circuits as compared to cmos and mrf designs (9 resultados)

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  • Idioma: Inglés

    Editorial: VDM Verlag Dr. Mueller Aktiengesellschaft & Co. KG, 2011

    3844332634 / 9783844332636

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    Librería: Books Puddle, Woodside, NY, Estados Unidos de AmericaBooks Puddle

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    EUR 80,03

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    Condición: New. pp. 88.

  • Idioma: Inglés

    Editorial: LAP LAMBERT Academic Publishing, 2011

    3844332634 / 9783844332636

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    Librería: preigu, Osnabrück, Alemaniapreigu

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    Taschenbuch. Condición: Neu. An Improved Markov Random Field Design Approach For Digital Circuits | Introducing Fault-Tolerance With Higher Noise-Immunity For The Nano-Circuits As Compared To CMOS And MRF Designs | Jahanzeb Anwer (u. a.) | Taschenbuch | 88 S. | Englisch | 2011 | LAP LAMBERT Academic Publishing | EAN 9783844332636 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu.…

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    Paperback. Condición: Like New. LIKE NEW. SHIPS FROM MULTIPLE LOCATIONS. book.

  • Idioma: Inglés

    Editorial: LAP LAMBERT Academic Publishing Mai 2011, 2011

    3844332634 / 9783844332636

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    Librería: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, AlemaniaBuchWeltWeit Ludwig Meier e.K.

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    Taschenbuch. Condición: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -As the MOSFET dimensions scale down to nanoscale level, the reliability of circuits based on these devices decreases. Therefore, a mechanism has to be devised that can make the nanoscale systems perform reliably using unreliable circuit components. The solution is fault-tolerant circuit design. Markov Random Field (MRF) is an effective approach that achieves fault-tolerance in integrated circuit design. The previous research on this technique suffers from limitations at the design, simulation and implementation levels. As improvements, the MRF fault-tolerance rules have been validated for a practical circuit example. The simulation framework is extended from thermal to a combination of thermal and random telegraph signal noise sources to provide a more rigorous noise environment for the simulation of nanoscale circuits. Moreover, an architecture-level improvement has been proposed in the design of previous MRF gates. The re-designed MRF is termed as Improved-MRF. By simulating various test circuits in Cadence, it is found that Improved-MRF circuits are 400 whereas MRF circuits are only 10 times more noise-tolerant than the CMOS alternatives. 88 pp. Englisch.…

  • Idioma: Inglés

    Editorial: VDM Verlag Dr. Mueller Aktiengesellschaft & Co. KG, 2011

    3844332634 / 9783844332636

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    Librería: Majestic Books, Hounslow, Reino UnidoMajestic Books

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    Condición: Nuevo

    EUR 80,08

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    Cantidad disponible: 4 disponibles

    Condición: New. Print on Demand pp. 88 2:B&W 6 x 9 in or 229 x 152 mm Perfect Bound on Creme w/Gloss Lam.

  • Idioma: Inglés

    Editorial: VDM Verlag Dr. Mueller Aktiengesellschaft & Co. KG, 2011

    3844332634 / 9783844332636

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    Librería: Biblios, frankfurt am main, HESSE, AlemaniaBiblios

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    EUR 79,52

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    Cantidad disponible: 4 disponibles

    Condición: New. PRINT ON DEMAND pp. 88.

  • Idioma: Inglés

    Editorial: LAP LAMBERT Academic Publishing, 2011

    3844332634 / 9783844332636

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    Librería: AHA-BUCH GmbH, Einbeck, AlemaniaAHA-BUCH GmbH

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    EUR 54,71

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    Taschenbuch. Condición: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - As the MOSFET dimensions scale down to nanoscale level, the reliability of circuits based on these devices decreases. Therefore, a mechanism has to be devised that can make the nanoscale systems perform reliably using unreliable circuit components. The solution is fault-tolerant circuit design. Markov Random Field (MRF) is an effective approach that achieves fault-tolerance in integrated circuit design. The previous research on this technique suffers from limitations at the design, simulation and implementation levels. As improvements, the MRF fault-tolerance rules have been validated for a practical circuit example. The simulation framework is extended from thermal to a combination of thermal and random telegraph signal noise sources to provide a more rigorous noise environment for the simulation of nanoscale circuits. Moreover, an architecture-level improvement has been proposed in the design of previous MRF gates. The re-designed MRF is termed as Improved-MRF. By simulating various test circuits in Cadence, it is found that Improved-MRF circuits are 400 whereas MRF circuits are only 10 times more noise-tolerant than the CMOS alternatives.…

  • Idioma: Inglés

    Editorial: LAP LAMBERT Academic Publishing, 2011

    3844332634 / 9783844332636

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    Librería: moluna, Greven, Alemaniamoluna

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    EUR 41,05

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    Condición: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Anwer JahanzebThe authors work under the banner of fault-tolerance research group in Universiti Teknologi PETRONAS (UTP). The group is conducting research on various aspects of fault-tolerant circuit design with the support of UTP an.…

  • Idioma: Inglés

    Editorial: LAP LAMBERT Academic Publishing Mai 2011, 2011

    3844332634 / 9783844332636

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    Librería: buchversandmimpf2000, Emtmannsberg, BAYE, Alemaniabuchversandmimpf2000

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    EUR 49,00

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    Taschenbuch. Condición: Neu. This item is printed on demand - Print on Demand Titel. Neuware -As the MOSFET dimensions scale down to nanoscale level, the reliability of circuits based on these devices decreases. Therefore, a mechanism has to be devised that can make the nanoscale systems perform reliably using unreliable circuit components. The solution is fault-tolerant circuit design. Markov Random Field (MRF) is an effective approach that achieves fault-tolerance in integrated circuit design. The previous research on this technique suffers from limitations at the design, simulation and implementation levels. As improvements, the MRF fault-tolerance rules have been validated for a practical circuit example. The simulation framework is extended from thermal to a combination of thermal and random telegraph signal noise sources to provide a more rigorous noise environment for the simulation of nanoscale circuits. Moreover, an architecture-level improvement has been proposed in the design of previous MRF gates. The re-designed MRF is termed as Improved-MRF. By simulating various test circuits in Cadence, it is found that Improved-MRF circuits are 400 whereas MRF circuits are only 10 times more noise-tolerant than the CMOS alternatives.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 88 pp. Englisch.…