Nagendra reddy (55 resultados)

Condición: New.

Paperback. Condición: Brand New. 88 pages. 8.66x5.91x0.20 inches. In Stock.

Condición: New.

Taschenbuch. Condición: Neu. Design and Implementation of FPGA based 64 bit MAC Unit | Siva Nagendra Reddy P. | Taschenbuch | 88 S. | Englisch | 2017 | LAP LAMBERT Academic Publishing | EAN 9783330345997 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu.…

Condición: New.

Paperback. Condición: Brand New. 116 pages. 8.66x5.91x0.27 inches. In Stock.

Paperback. Condición: Brand New. 244 pages. 8.66x5.91x0.55 inches. In Stock.

Taschenbuch. Condición: Neu. Generation of IRNSS Standard Positioning Signal | Siva Nagendra Reddy P. (u. a.) | Taschenbuch | 244 S. | Englisch | 2016 | LAP LAMBERT Academic Publishing | EAN 9783659973499 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu.…

paperback. Condición: New. NEW. SHIPS FROM MULTIPLE LOCATIONS. book.

Taschenbuch. Condición: Neu. Conception et implémentation d'une unité MAC 64 bits basée sur un FPGA | Siva Nagendra Reddy P. | Taschenbuch | Französisch | 2024 | Editions Notre Savoir | EAN 9786207503209 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu.…

Taschenbuch. Condición: Neu. Conceção e implementação de uma unidade MAC de 64 bits baseada em FPGA | Siva Nagendra Reddy P. | Taschenbuch | Portugiesisch | 2024 | Edições Nosso Conhecimento | EAN 9786207503223 | Verantwortliche Person für die EU: SIA OmniScriptum Publishing, Brivibas Gatve 197, 1039 RIGA, LETTLAND, customerservice[at]vdm-vsg[dot]de | Anbieter: preigu. …

Taschenbuch. Condición: Neu. Progettazione e implementazione di un'unità MAC a 64 bit basata su FPGA | Siva Nagendra Reddy P. | Taschenbuch | Italienisch | 2024 | Edizioni Sapienza | EAN 9786207503216 | Verantwortliche Person für die EU: SIA OmniScriptum Publishing, Brivibas Gatve 197, 1039 RIGA, LETTLAND, customerservice[at]vdm-vsg[dot]de | Anbieter: preigu. …

Taschenbuch. Condición: Neu. Entwurf und Implementierung einer FPGA-basierten 64-Bit-MAC-Einheit | Siva Nagendra Reddy P. | Taschenbuch | 88 S. | Deutsch | 2024 | Verlag Unser Wissen | EAN 9786207503186 | Verantwortliche Person für die EU: SIA OmniScriptum Publishing, Brivibas Gatve 197, 1039 RIGA, LETTLAND, customerservice[at]vdm-vsg[dot]de | Anbieter: preigu. …

Taschenbuch. Condición: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Nowadays in VLSI, the technology size, power, and speed are the main constraints to design any circuits. In normal multipliers, delay will be more and the number of computations also will be more. Because of that speed of the circuits designed with the normal multipliers will be low and it will consume more power. This book describes Multiply and Accumulate Unit using Vedic Multiplier and DKG reversible logic gates. The Vedic Multiplier is designed by using Urdhava Triyagbhayam sutra and the adder design is done by using reversible logic to perform high speed operations. Reversible logic gates are also the essential constraint for the promising field of Quantum computing. The Urdhava Triyagbhayam multiplier is used for the multiplication function to reduce partial products in the multiplication process and to get high concert and less area. The reversible logic is used to get less power. The MAC is designed using Verilog code, simulation, synthesis is done in both RTL compiler using Xilinx and implemented on Spartan 3e FPGA Board. 88 pp. Englisch. …

Paperback. Condición: new. Paperback. Pumped Storage Hydropower Engineering (Volume I: Planning, Hydrology and Hydraulic Systems)As clean energy transitions accelerate worldwide, Pumped Storage Hydropower (PSH) stands at the forefront of grid-scale energy storage. Serving as the primary long-duration balancing force for variable renewable sources like solar and wind, modern PSH systems require complex, multi-disciplinary engineering solutions.Pumped Storage Hydropower Engineering (Volume I) provides a comprehensive, practical, and highly technical guide to the early-stage planning, site selection, hydrological analysis, and hydraulic design of modern pumped storage facilities. Grounded in both theoretical fundamentals and real-world project execution, this volume serves as an indispensable reference for practicing engineers, energy consultants, power planners, and academic researchers.Key Topics Covered in Volume I: Energy Storage & Grid Integration: The role of PSH in frequency control, inertia provision, load shifting, and supporting high-penetration renewable power grids.Site Identification & Layout: GIS-based desktop screening, digital elevation modeling (DEM), geological mapping, and layout optimization for upper and lower reservoirs.Hydrology & Water Availability: Catchment runoff modeling, flood estimation, sediment management, water balance assessments, and climate resilience in headwater systems.Reservoir Engineering, Hydraulic & Water Conductor Systems This item is printed on demand. Shipping may be from multiple locations in the US or from the UK, depending on stock availability.…

PAP. Condición: New. New Book. Shipped from UK. THIS BOOK IS PRINTED ON DEMAND. Established seller since 2000.

PAP. Condición: New. New Book. Delivered from our UK warehouse in 4 to 14 business days. THIS BOOK IS PRINTED ON DEMAND. Established seller since 2000.

Taschenbuch. Condición: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware 88 pp. Spanisch.

Taschenbuch. Condición: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Nowadays in VLSI, the technology size, power, and speed are the main constraints to design any circuits. In normal multipliers, delay will be more and the number of computations also will be more. Because of that speed of the circuits designed with the normal multipliers will be low and it will consume more power. This book describes Multiply and Accumulate Unit using Vedic Multiplier and DKG reversible logic gates. The Vedic Multiplier is designed by using Urdhava Triyagbhayam sutra and the adder design is done by using reversible logic to perform high speed operations. Reversible logic gates are also the essential constraint for the promising field of Quantum computing. The Urdhava Triyagbhayam multiplier is used for the multiplication function to reduce partial products in the multiplication process and to get high concert and less area. The reversible logic is used to get less power. The MAC is designed using Verilog code, simulation, synthesis is done in both RTL compiler using Xilinx and implemented on Spartan 3e FPGA Board.…

Condición: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: P. Siva Nagendra ReddyMr. P. Siva Nagendra Reddy was born in Anantapur District, A.P.,India.He obtained Masters Degree in VLSI System Design from JNTU Anantapur in 2013.Mr. Siva is working as an Assistant Professor in the Department . …

Taschenbuch. Condición: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware 88 pp. Französisch.

Condición: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Easwar Rao D.D. Easwar Rao, M.Sc.- Studied Biochemistry at GITAM University, Visakhapatnam, Andhra Pradesh, India.In spite of tremendous development in the field of synthetic drugs during recent era, they found to have some or ot.…

Condición: New. Print on Demand.

Taschenbuch. Condición: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -The objective is to add to a solitary channel IRNSS Standard situating Service SIGNAL model utilizing MATLAB-SIMULINK. Gives a general thought of how the strategy of the SPS SIGNAL generator works where the comprehension of IRNSS innovation can be seen in the recreation's flow. A study is made on generation and properties of the PRN codes from navigational system viewpoint. Additionally shows the design and implementation of PRN code on Spartan-II FPGA Hardware. Exhibits the execution analysis and simulation of auto-correlation Function (ACF) and cross-correlation Function (CCF) properties for PRN sequence. Demonstrating this SPS SIGNAL generator in MATLAB/SIMULINK has point of interest of its particularity, which permits the client to supplant the actualized system by the user own construction modeling. 244 pp. Englisch.…

Taschenbuch. Condición: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Hoy en día en VLSI, el tamaño de la tecnología, la potencia y la velocidad son las principales limitaciones para diseñar cualquier circuito. En los multiplicadores normales, el retardo será mayor y el número de cálculos también será mayor. Por ello, la velocidad de los circuitos diseñados con multiplicadores normales será baja y consumirán más energía. Este libro describe la Unidad de Multiplicación y Acumulación usando el Multiplicador Védico y las puertas lógicas reversibles DKG. El Multiplicador Védico se diseña utilizando el sutra Urdhava Triyagbhayam y el diseño del sumador se realiza utilizando lógica reversible para realizar operaciones de alta velocidad. Las puertas lógicas reversibles son también la restricción esencial para el prometedor campo de la computación cuántica. El multiplicador Urdhava Triyagbhayam se utiliza para la función de multiplicación para reducir los productos parciales en el proceso de multiplicación y para obtener un alto concierto y menos área. La lógica reversible se utiliza para obtener menos energía. El MAC está diseñado utilizando código Verilog, simulación, síntesis se realiza tanto en RTL compilador utilizando Xilinx e implementado en Spartan 3e FPGA Board.…

Hardcover. Condición: new. Hardcover. Pumped Storage Hydropower Engineering (Volume I: Planning, Hydrology and Hydraulic Systems)As clean energy transitions accelerate worldwide, Pumped Storage Hydropower (PSH) stands at the forefront of grid-scale energy storage. Serving as the primary long-duration balancing force for variable renewable sources like solar and wind, modern PSH systems require complex, multi-disciplinary engineering solutions.Pumped Storage Hydropower Engineering (Volume I) provides a comprehensive, practical, and highly technical guide to the early-stage planning, site selection, hydrological analysis, and hydraulic design of modern pumped storage facilities. Grounded in both theoretical fundamentals and real-world project execution, this volume serves as an indispensable reference for practicing engineers, energy consultants, power planners, and academic researchers.Key Topics Covered in Volume I: Energy Storage & Grid Integration: The role of PSH in frequency control, inertia provision, load shifting, and supporting high-penetration renewable power grids.Site Identification & Layout: GIS-based desktop screening, digital elevation modeling (DEM), geological mapping, and layout optimization for upper and lower reservoirs.Hydrology & Water Availability: Catchment runoff modeling, flood estimation, sediment management, water balance assessments, and climate resilience in headwater systems.Reservoir Engineering, Hydraulic & Water Conductor Systems This item is printed on demand. Shipping may be from multiple locations in the US or from the UK, depending on stock availability.…

HRD. Condición: New. New Book. Shipped from UK. THIS BOOK IS PRINTED ON DEMAND. Established seller since 2000.

HRD. Condición: New. New Book. Delivered from our UK warehouse in 4 to 14 business days. THIS BOOK IS PRINTED ON DEMAND. Established seller since 2000.

Taschenbuch. Condición: Neu. This item is printed on demand - Print on Demand Titel. Neuware -Nowadays in VLSI, the technology size, power, and speed are the main constraints to design any circuits. In normal multipliers, delay will be more and the number of computations also will be more. Because of that speed of the circuits designed with the normal multipliers will be low and it will consume more power. This book describes Multiply and Accumulate Unit using Vedic Multiplier and DKG reversible logic gates. The Vedic Multiplier is designed by using Urdhava Triyagbhayam sutra and the adder design is done by using reversible logic to perform high speed operations. Reversible logic gates are also the essential constraint for the promising field of Quantum computing. The Urdhava Triyagbhayam multiplier is used for the multiplication function to reduce partial products in the multiplication process and to get high concert and less area. The reversible logic is used to get less power. The MAC is designed using Verilog code, simulation, synthesis is done in both RTL compiler using Xilinx and implemented on Spartan 3e FPGA Board.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 88 pp. Englisch.…

Condición: New. PRINT ON DEMAND.