Joobbani (24 resultados)

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Librería: Friends of the Library Bookstore, Eau Claire, WI, Estados Unidos de AmericaFriends of the Library Bookstore
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EUR 14,04
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Hardcover. Condición: Good. No Jacket. A used textbook that has a coffee-colored stain on the top edge. The pages are otherwise clean and unmarked. The spine is slightly cocked and shows some shelf wear on the top and bottom. A few handling marks on the back cover. The corners are sharp. 159 p. "Routing of VLSI chips is an important, time-consuming, and difficult problem. The difficulty of the problem is attributed to the large number of often conflicting factors that affect the routing quality." Not ex-library. Shelf: B-1. …

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Librería: Ammareal, Morangis, FranciaAmmareal
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EUR 6,49
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Hardcover. Condición: Bon. Ancien livre de bibliothèque. Traces d'usure sur la couverture. Edition 1986. Ammareal reverse jusqu'à 15% du prix net de cet article à des organisations caritatives. ENGLISH DESCRIPTION Book Condition: Used, Good. Former library book. Signs of wear on the cover. Edition 1986. Ammareal gives back up to 15% of this item's net price to charity organizations.…

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Librería: BOOKWEST, Phoenix, AZ, Estados Unidos de AmericaBOOKWEST
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EUR 87,19
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Librería: GreatBookPrices, Columbia, MD, Estados Unidos de AmericaGreatBookPrices
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EUR 123,40
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Librería: GreatBookPrices, Columbia, MD, Estados Unidos de AmericaGreatBookPrices
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EUR 126,77
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Librería: Ria Christie Collections, Uxbridge, Reino UnidoRia Christie Collections
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EUR 131,29
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Condición: New. In English.

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Librería: Ria Christie Collections, Uxbridge, Reino UnidoRia Christie Collections
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Condición: New. In English.

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EUR 143,99
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Librería: GreatBookPricesUK, Woodford Green, Reino UnidoGreatBookPricesUK
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EUR 129,30
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Librería: GreatBookPricesUK, Woodford Green, Reino UnidoGreatBookPricesUK
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EUR 131,27
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Librería: GreatBookPrices, Columbia, MD, Estados Unidos de AmericaGreatBookPrices
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EUR 148,43
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Librería: moluna, Greven, Alemaniamoluna
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EUR 100,59
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Condición: New. Routing of VLSI chips is an important, time consuming, and difficult problem. The difficulty of the problem is attributed to the large number of often conflicting factors that affect the routing quality. Traditional techniques have approached routing by ign.

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Librería: Books Puddle, Woodside, NY, Estados Unidos de AmericaBooks Puddle
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EUR 156,90
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Condición: New. pp. 184.

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Librería: Books Puddle, Woodside, NY, Estados Unidos de AmericaBooks Puddle
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EUR 168,38
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Condición: New. pp. 184.

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Librería: moluna, Greven, Alemaniamoluna
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EUR 128,20
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Condición: New. Routing of VLSI chips is an important, time consuming, and difficult problem. The difficulty of the problem is attributed to the large number of often conflicting factors that affect the routing quality. Traditional techniques have approached routing by ign.

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Librería: AHA-BUCH GmbH, Einbeck, AlemaniaAHA-BUCH GmbH
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EUR 172,08
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Buch. Condición: Neu. Neuware - Routing of VLSI chips is an important, time consuming, and difficult problem. The difficulty of the problem is attributed to the large number of often conflicting factors that affect the routing quality. Traditional techniques have approached routing by ignoring some of these factors and imposing unnecessary constraints in order to make routing tractable. In addition to the imposition of these restrictions, which simplify the problems to a degree but at the same time reduce the routing quality, traditional approaches use brute force. They often transform the problem into mathematical or graph problems and completely ignore the specific knowledge about the routing task that can greatly help the solution. This thesis overcomes some of the above problems and presents a system that performs routing close to what human designers do. In other words it heavily capitalizes on the knowledge of human expertise in this area, it does not impose unnecessary constraints, it considers all the different factors that affect the routing quality, and most importantly it allows constant user interaction throughout the routing process. To achieve the above, this thesis presents background about some representative techniques for routing and summarizes their characteristics. It then studies in detail the different factors (such as minimum area, number of vias, wire length, etc.) that affect the routing quality, and the different criteria (such as vertical/horizontal constraint graph, merging, minimal rectilinear Steiner tree, etc.) that can be used to optimize these factors.…

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Librería: Brook Bookstore On Demand, Napoli, NA, ItaliaBrook Bookstore On Demand
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EUR 86,24
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Condición: new. Questo è un articolo print on demand.

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Librería: AHA-BUCH GmbH, Einbeck, AlemaniaAHA-BUCH GmbH
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EUR 124,85
Envío por EUR 35,00Se envía de Alemania a Estados Unidos de AmericaCantidad disponible: 1 disponible
Taschenbuch. Condición: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Routing of VLSI chips is an important, time consuming, and difficult problem. The difficulty of the problem is attributed to the large number of often conflicting factors that affect the routing quality. Traditional techniques have approached routing by ignoring some of these factors and imposing unnecessary constraints in order to make routing tractable. In addition to the imposition of these restrictions, which simplify the problems to a degree but at the same time reduce the routing quality, traditional approaches use brute force. They often transform the problem into mathematical or graph problems and completely ignore the specific knowledge about the routing task that can greatly help the solution. This thesis overcomes some of the above problems and presents a system that performs routing close to what human designers do. In other words it heavily capitalizes on the knowledge of human expertise in this area, it does not impose unnecessary constraints, it considers all the different factors that affect the routing quality, and most importantly it allows constant user interaction throughout the routing process. To achieve the above, this thesis presents background about some representative techniques for routing and summarizes their characteristics. It then studies in detail the different factors (such as minimum area, number of vias, wire length, etc.) that affect the routing quality, and the different criteria (such as vertical/horizontal constraint graph, merging, minimal rectilinear Steiner tree, etc.) that can be used to optimize these factors. …

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Librería: buchversandmimpf2000, Emtmannsberg, BAYE, Alemaniabuchversandmimpf2000
Contactar con el vendedorVendedor de 5 estrellasCondición: Nuevo
EUR 106,99
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Taschenbuch. Condición: Neu. This item is printed on demand - Print on Demand Titel. Neuware -Routing of VLSI chips is an important, time consuming, and difficult problem. The difficulty of the problem is attributed to the large number of often conflicting factors that affect the routing quality. Traditional techniques have approached routing by ignoring some of these factors and imposing unnecessary constraints in order to make routing tractable. In addition to the imposition of these restrictions, which simplify the problems to a degree but at the same time reduce the routing quality, traditional approaches use brute force. They often transform the problem into mathematical or graph problems and completely ignore the specific knowledge about the routing task that can greatly help the solution. This thesis overcomes some of the above problems and presents a system that performs routing close to what human designers do. In other words it heavily capitalizes on the knowledge of human expertise in this area, it does not impose unnecessary constraints, it considers all the different factors that affect the routing quality, and most importantly it allows constant user interaction throughout the routing process. To achieve the above, this thesis presents background about some representative techniques for routing and summarizes their characteristics. It then studies in detail the different factors (such as minimum area, number of vias, wire length, etc.) that affect the routing quality, and the different criteria (such as vertical/horizontal constraint graph, merging, minimal rectilinear Steiner tree, etc.) that can be used to optimize these factors.Springer-Verlag KG, Sachsenplatz 4-6, 1201 Wien 184 pp. Englisch. …

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Librería: Majestic Books, Hounslow, Reino UnidoMajestic Books
Contactar con el vendedorVendedor de 4 estrellasCondición: Nuevo
EUR 164,54
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Condición: New. Print on Demand pp. 184 66:B&W 7 x 10 in or 254 x 178 mm Perfect Bound on White w/Gloss Lam.

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Librería: Biblios, frankfurt am main, HESSE, AlemaniaBiblios
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EUR 165,38
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Condición: New. PRINT ON DEMAND pp. 184.

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Librería: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, AlemaniaBuchWeltWeit Ludwig Meier e.K.
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EUR 155,10
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Taschenbuch. Condición: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Routing of VLSI chips is an important, time consuming, and difficult problem. The difficulty of the problem is attributed to the large number of often conflicting factors that affect the routing quality. Traditional techniques have approached routing by ignoring some of these factors and imposing unnecessary constraints in order to make routing tractable. In addition to the imposition of these restrictions, which simplify the problems to a degree but at the same time reduce the routing quality, traditional approaches use brute force. They often transform the problem into mathematical or graph problems and completely ignore the specific knowledge about the routing task that can greatly help the solution. This thesis overcomes some of the above problems and presents a system that performs routing close to what human designers do. In other words it heavily capitalizes on the knowledge of human expertise in this area, it does not impose unnecessary constraints, it considers all the different factors that affect the routing quality, and most importantly it allows constant user interaction throughout the routing process. To achieve the above, this thesis presents background about some representative techniques for routing and summarizes their characteristics. It then studies in detail the different factors (such as minimum area, number of vias, wire length, etc.) that affect the routing quality, and the different criteria (such as vertical/horizontal constraint graph, merging, minimal rectilinear Steiner tree, etc.) that can be used to optimize these factors. 184 pp. Englisch.…

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Librería: Majestic Books, Hounslow, Reino UnidoMajestic Books
Contactar con el vendedorVendedor de 4 estrellasCondición: Nuevo
EUR 176,10
Envío por EUR 7,76Se envía de Reino Unido a Estados Unidos de AmericaCantidad disponible: 4 disponibles
Condición: New. Print on Demand pp. 184 68:B&W 7 x 10 in or 254 x 178 mm Case Laminate on White w/Gloss Lam.

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Librería: Biblios, frankfurt am main, HESSE, AlemaniaBiblios
Contactar con el vendedorVendedor de 4 estrellasCondición: Nuevo
EUR 176,78
Envío por EUR 9,95Se envía de Alemania a Estados Unidos de AmericaCantidad disponible: 4 disponibles
Condición: New. PRINT ON DEMAND pp. 184.