Ismail yehea (49 resultados)

Condición: New.

Condición: New.

Condición: New.

Condición: As New. Unread book in perfect condition.

Condición: As New. Unread book in perfect condition.

Condición: New.

Condición: New.

Condición: New. In English.

Condición: New.

Condición: New. In English.

Condición: New. In English.

Condición: New. In English.

Condición: New. Deals with the design and analysis of integrated circuits with a specific focus on on-chip inductance effects. This book is filled with design and analysis techniques for RLC interconnect. These techniques are compared to techniques traditionally used for RC interconnect design to emphasize the effect of inductance. Num Pages: 303 pages, biography. BIC Classification: TJFC. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly; (UU) Undergraduate. Dimension: 234 x 156 x 19. Weight in Grams: 1420. . 2001. Hardback. . . . .…

Condición: New. pp. 108.

Condición: New. pp. 179.

Condición: New. pp. 328.

Buch. Condición: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book presents a wide-band and technology independent, SPICE-compatible RLC model for through-silicon vias (TSVs) in 3D integrated circuits. This model accounts for a variety of effects, including skin effect, depletion capacitance and nearby contact effects. Readers will benefit from in-depth coverage of concepts and technology such as 3D integration, Macro modeling, dimensional analysis and compact modeling, as well as closed form equations for the through silicon via parasitics. Concepts covered are demonstrated by using TSVs in applications such as a spiral inductor and inductive-based communication system and bandpass filtering.…

Condición: New. pp. 332.

Taschenbuch. Condición: Neu. On-Chip Inductance in High Speed Integrated Circuits | Yehea I. Ismail (u. a.) | Taschenbuch | xxii | Englisch | 2012 | Springer | EAN 9781461356776 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu. …

Hardcover. Condición: Brand New. 2015 edition. 179 pages. 9.25x6.25x0.50 inches. In Stock.

Condición: Gut. Zustand: Gut | Seiten: 332 | Sprache: Englisch | Produktart: Bücher | The appropriate interconnect model has changed several times over the past two decades due to the application of aggressive technology scaling. New, more accurate interconnect models are required to manage the changing physical characteristics of integrated circuits. Currently, RC models are used to analyze high resistance nets while capacitive models are used for less resistive interconnect. However, on-chip inductance is becoming more important with integrated circuits operating at higher frequencies, since the inductive impedance is proportional to the frequency. The operating frequencies of integrated circuits have increased dramatically over the past decade and are expected to maintain the same rate of increase over the next decade, approaching 10 GHz by the year 2012. Also, wide wires are frequently encountered in important global nets, such as clock distribution networks and in upper metal layers, and performance requirements are pushing the introduction of new materials for low resistance interconnect, such as copper interconnect already used in many commercial CMOS technologies. On-Chip Inductance in High Speed Integrated Circuits deals with the design and analysis of integrated circuits with a specific focus on on-chip inductance effects. It has been described throughout this book that inductance can have a tangible effect on current high speed integrated circuits. For example, neglecting inductance and using an RC interconnect model in a production 0.25 mum CMOS technology can cause large errors (over 35%) in estimates of the propagation delay of on-chip interconnect. It has also been shown that including inductance in the repeater insertion design process as compared to using an RC model improves the overall repeater solution in terms of area, power, and delay with average savings of 40.8%, 15.6%, and 6.7%, respectively. On-Chip Inductance in High Speed Integrated Circuitsis full of design and analysis techniques for RLC interconnect. These techniques are compared to techniques traditionally used for RC interconnect design to emphasize the effect of inductance. On-Chip Inductance in High Speed Integrated Circuits will be of interest to researchers in the area of high frequency interconnect, noise, and high performance integrated circuit design.…

Condición: Gut. Zustand: Gut | Seiten: 332 | Sprache: Englisch | Produktart: Bücher | The appropriate interconnect model has changed several times over the past two decades due to the application of aggressive technology scaling. New, more accurate interconnect models are required to manage the changing physical characteristics of integrated circuits. Currently, RC models are used to analyze high resistance nets while capacitive models are used for less resistive interconnect. However, on-chip inductance is becoming more important with integrated circuits operating at higher frequencies, since the inductive impedance is proportional to the frequency. The operating frequencies of integrated circuits have increased dramatically over the past decade and are expected to maintain the same rate of increase over the next decade, approaching 10 GHz by the year 2012. Also, wide wires are frequently encountered in important global nets, such as clock distribution networks and in upper metal layers, and performance requirements are pushing the introduction of new materials for low resistance interconnect, such as copper interconnect already used in many commercial CMOS technologies. On-Chip Inductance in High Speed Integrated Circuits deals with the design and analysis of integrated circuits with a specific focus on on-chip inductance effects. It has been described throughout this book that inductance can have a tangible effect on current high speed integrated circuits. For example, neglecting inductance and using an RC interconnect model in a production 0.25 mum CMOS technology can cause large errors (over 35%) in estimates of the propagation delay of on-chip interconnect. It has also been shown that including inductance in the repeater insertion design process as compared to using an RC model improves the overall repeater solution in terms of area, power, and delay with average savings of 40.8%, 15.6%, and 6.7%, respectively. On-Chip Inductance in High Speed Integrated Circuitsis full of design and analysis techniques for RLC interconnect. These techniques are compared to techniques traditionally used for RC interconnect design to emphasize the effect of inductance. On-Chip Inductance in High Speed Integrated Circuits will be of interest to researchers in the area of high frequency interconnect, noise, and high performance integrated circuit design.…

Condición: New. Deals with the design and analysis of integrated circuits with a specific focus on on-chip inductance effects. This book is filled with design and analysis techniques for RLC interconnect. These techniques are compared to techniques traditionally used for RC interconnect design to emphasize the effect of inductance. Num Pages: 303 pages, biography. BIC Classification: TJFC. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly; (UU) Undergraduate. Dimension: 234 x 156 x 19. Weight in Grams: 1420. . 2001. Hardback. . . . . Books ship from the US and Ireland.…

Paperback. Condición: Brand New. reprint edition. 192 pages. 9.25x6.10x0.46 inches. In Stock.

Condición: As New. Unread book in perfect condition.

Hardcover. Condición: Like New. LIKE NEW. SHIPS FROM MULTIPLE LOCATIONS. book.

Hardcover. Condición: gut. 2001. On-Chip Inductance in High Speed Integrated Circuits In englischer Sprache. pages.

Condición: As New. Unread book in perfect condition.

Condición: As New. Unread book in perfect condition.

Hardcover. Condición: Like New. LIKE NEW. SHIPS FROM MULTIPLE LOCATIONS. book.