high resolution high speed integrated cmos (25 resultados)

XIV, 171 p. Hardcover. Einband bestoßen, daher Mängelexemplar gestempelt, sonst sehr guter Zustand. Imperfect copy due to slightly bumped cover, apart from this in very good condition. Stamped. Analog Circuits and Signal Processing. Sprache: Englisch.

Hardcover. Condición: Very Good. 1. Auflage. unread, with a mimimum of shelfwear.

Condición: Brand New. New. US edition. Expediting shipping for all USA and Europe orders excluding PO Box. Excellent Customer Service.

Condición: New. In.

Condición: New. pp. 185.

Condición: New. pp. 172.

Condición: Sehr gut. Zustand: Sehr gut | Sprache: Englisch | Produktart: Bücher | This book is a step-by-step tutorial on how to design a low-power, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) integrated CMOS analog-to-digital (AD) converter, to respond to the challenge from the rapid growth of IoT. The discussion includes design techniques on both the system level and the circuit block level. In the architecture level, the power-efficient pipelined AD converter, the hybrid AD converter and the time-interleaved AD converter are described. In the circuit block level, the reference voltage buffer, the opamp, the comparator, and the calibration are presented. Readers designing low-power and high-performance AD converters won¿t want to miss this invaluable reference.Provides an in-depth introduction to the newest design techniques for the power-efficient, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) AD converter; Presents three types of power-efficient architectures of the high-resolution and high-speed AD converter; Discusses the relevant circuit blocks (i.e., the reference voltage buffer, the opamp, and the comparator) in two aspects, relaxing the requirements and improving the performance.

Hardcover. Condición: Brand New. 171 pages. 9.25x6.25x0.75 inches. In Stock.

Taschenbuch. Condición: Neu. High-Resolution and High-Speed Integrated CMOS AD Converters for Low-Power Applications | Weitao Li (u. a.) | Taschenbuch | Analog Circuits and Signal Processing | xiv | Englisch | 2018 | Springer | EAN 9783319872131 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu.

Taschenbuch. Condición: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book is a step-by-step tutorial on how to design a low-power, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) integrated CMOS analog-to-digital (AD) converter, to respond to the challenge from the rapid growth of IoT. The discussion includes design techniques on both the system level and the circuit block level. In the architecture level, the power-efficient pipelined AD converter, the hybrid AD converter and the time-interleaved AD converter are described. In the circuit block level, the reference voltage buffer, the opamp, the comparator, and the calibration are presented. Readers designing low-power and high-performance AD converters won't want to miss this invaluable reference.Provides an in-depth introduction to the newest design techniques for the power-efficient, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) AD converter;Presents three types of power-efficient architectures of the high-resolution and high-speed AD converter;Discusses the relevant circuit blocks (i.e., the reference voltage buffer, the opamp, and the comparator) in two aspects, relaxing the requirements and improving the performance.

Buch. Condición: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book is a step-by-step tutorial on how to design a low-power, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) integrated CMOS analog-to-digital (AD) converter, to respond to the challenge from the rapid growth of IoT. The discussion includes design techniques on both the system level and the circuit block level. In the architecture level, the power-efficient pipelined AD converter, the hybrid AD converter and the time-interleaved AD converter are described. In the circuit block level, the reference voltage buffer, the opamp, the comparator, and the calibration are presented. Readers designing low-power and high-performance AD converters won't want to miss this invaluable reference.Provides an in-depth introduction to the newest design techniques for the power-efficient, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) AD converter;Presents three types of power-efficient architectures of the high-resolution and high-speed AD converter;Discusses the relevant circuit blocks (i.e., the reference voltage buffer, the opamp, and the comparator) in two aspects, relaxing the requirements and improving the performance.

Paperback. Condición: Brand New. reprint edition. 188 pages. 9.25x6.10x0.43 inches. In Stock.

Condición: New. Brand New! Fast Delivery This is an International Edition and ship within 24-48 hours. Deliver by FedEx and Dhl, & Aramex, UPS, & USPS and we do accept APO and PO BOX Addresses. Order can be delivered worldwide within 6-10 days and we do have flat rate for up to 2LB. Extra shipping charges will be requested if the Book weight is more than 5 LB. This Item May be shipped from India, United states & United Kingdom. Depending on your location and availability.

Hardcover. Condición: New. NEW. SHIPS FROM MULTIPLE LOCATIONS. book.

Paperback. Condición: New. NEW. SHIPS FROM MULTIPLE LOCATIONS. book.

Buch. Condición: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book is a step-by-step tutorial on how to design a low-power, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) integrated CMOS analog-to-digital (AD) converter, to respond to the challenge from the rapid growth of IoT. The discussion includes design techniques on both the system level and the circuit block level. In the architecture level, the power-efficient pipelined AD converter, the hybrid AD converter and the time-interleaved AD converter are described. In the circuit block level, the reference voltage buffer, the opamp, the comparator, and the calibration are presented. Readers designing low-power and high-performance AD converters won't want to miss this invaluable reference.Provides an in-depth introduction to the newest design techniques for the power-efficient, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) AD converter;Presents three types of power-efficient architectures of the high-resolution and high-speed AD converter;Discusses the relevant circuit blocks (i.e., the reference voltage buffer, the opamp, and the comparator) in two aspects, relaxing the requirements and improving the performance. 188 pp. Englisch.

Taschenbuch. Condición: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book is a step-by-step tutorial on how to design a low-power, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) integrated CMOS analog-to-digital (AD) converter, to respond to the challenge from the rapid growth of IoT. The discussion includes design techniques on both the system level and the circuit block level. In the architecture level, the power-efficient pipelined AD converter, the hybrid AD converter and the time-interleaved AD converter are described. In the circuit block level, the reference voltage buffer, the opamp, the comparator, and the calibration are presented. Readers designing low-power and high-performance AD converters won't want to miss this invaluable reference.Provides an in-depth introduction to the newest design techniques for the power-efficient, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) AD converter;Presents three types of power-efficient architectures of the high-resolution and high-speed AD converter;Discusses the relevant circuit blocks (i.e., the reference voltage buffer, the opamp, and the comparator) in two aspects, relaxing the requirements and improving the performance. 188 pp. Englisch.

Gebunden. Condición: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Provides an in-depth introduction to the newest design techniques for the power-efficient, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) AD converter Presents three types of power-efficient architectures of the h.

Condición: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Provides an in-depth introduction to the newest design techniques for the power-efficient, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) AD converter Presents three types of power-efficient architectures of the h.

Condición: New. Print on Demand pp. 172.

Condición: New. Print on Demand pp. 185.

Condición: New. PRINT ON DEMAND pp. 172.

Condición: New. PRINT ON DEMAND pp. 185.

Taschenbuch. Condición: Neu. This item is printed on demand - Print on Demand Titel. Neuware -This book is a step-by-step tutorial on how to design a low-power, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) integrated CMOS analog-to-digital (AD) converter, to respond to the challenge from the rapid growth of IoT. The discussion includes design techniques on both the system level and the circuit block level. In the architecture level, the power-efficient pipelined AD converter, the hybrid AD converter and the time-interleaved AD converter are described. In the circuit block level, the reference voltage buffer, the opamp, the comparator, and the calibration are presented. Readers designing low-power and high-performance AD converters won¿t want to miss this invaluable reference.Provides an in-depth introduction to the newest design techniques for the power-efficient, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) AD converter;Presents three types of power-efficient architectures of thehigh-resolution and high-speed AD converter;Discusses the relevant circuit blocks (i.e., the reference voltage buffer, the opamp, and the comparator) in two aspects, relaxing the requirements and improving the performance.Springer-Verlag KG, Sachsenplatz 4-6, 1201 Wien 188 pp. Englisch.

Buch. Condición: Neu. This item is printed on demand - Print on Demand Titel. Neuware -This book is a step-by-step tutorial on how to design a low-power, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) integrated CMOS analog-to-digital (AD) converter, to respond to the challenge from the rapid growth of IoT. The discussion includes design techniques on both the system level and the circuit block level. In the architecture level, the power-efficient pipelined AD converter, the hybrid AD converter and the time-interleaved AD converter are described. In the circuit block level, the reference voltage buffer, the opamp, the comparator, and the calibration are presented. Readers designing low-power and high-performance AD converters won¿t want to miss this invaluable reference.Provides an in-depth introduction to the newest design techniques for the power-efficient, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) AD converter;Presents three types of power-efficient architectures of thehigh-resolution and high-speed AD converter;Discusses the relevant circuit blocks (i.e., the reference voltage buffer, the opamp, and the comparator) in two aspects, relaxing the requirements and improving the performance.Springer-Verlag KG, Sachsenplatz 4-6, 1201 Wien 188 pp. Englisch.