ISBN: 9783330331792 - cmos area efficient approximate arithmetic architectures (5 resultados)

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  • Idioma: Inglés

    Editorial: LAP LAMBERT Academic Publishing, 2017

    3330331798 / 9783330331792

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    Librería: Mispah books, Redhill, SURRE, Reino UnidoMispah books

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    paperback. Condición: New. NEW. SHIPS FROM MULTIPLE LOCATIONS. book.

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    Editorial: LAP LAMBERT Academic Publishing Jun 2017, 2017

    3330331798 / 9783330331792

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    Librería: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, AlemaniaBuchWeltWeit Ludwig Meier e.K.

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    Taschenbuch. Condición: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Approximate computation provide alternate solution to reduce energy consumption of high performance present day DSP application devices. Conventional multiplication and addition techniques consume a lot of energy. In this brief design of approximate arithmetic units for signal processing application is explored. First an approximate adder is proposed by changing the logic of basic full adder cell. The proposed adder cell has fewer transistor count compared to recent similar approach. Next, an approximate multiplier with low error is designed using lead one detection and selecting n/2 bits for an n bit input. The proposed n/2 bit approximate multiplier performs well in terms of error and power performance compared to recent similar approach. In continuation the approximate units are implemented in a Multiply-Accumulate(MAC) unit. The proposed approximate MAC unit provides significant improvement in power, area, and delay at the cost of little degrade in accuracy. Finally, the proposed MAC unit is implemented in filtering application to verify the functionality. 60 pp. Englisch.…

  • Idioma: Inglés

    Editorial: LAP LAMBERT Academic Publishing, 2017

    3330331798 / 9783330331792

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    Librería: AHA-BUCH GmbH, Einbeck, AlemaniaAHA-BUCH GmbH

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    Taschenbuch. Condición: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Approximate computation provide alternate solution to reduce energy consumption of high performance present day DSP application devices. Conventional multiplication and addition techniques consume a lot of energy. In this brief design of approximate arithmetic units for signal processing application is explored. First an approximate adder is proposed by changing the logic of basic full adder cell. The proposed adder cell has fewer transistor count compared to recent similar approach. Next, an approximate multiplier with low error is designed using lead one detection and selecting n/2 bits for an n bit input. The proposed n/2 bit approximate multiplier performs well in terms of error and power performance compared to recent similar approach. In continuation the approximate units are implemented in a Multiply-Accumulate(MAC) unit. The proposed approximate MAC unit provides significant improvement in power, area, and delay at the cost of little degrade in accuracy. Finally, the proposed MAC unit is implemented in filtering application to verify the functionality.…

  • Idioma: Inglés

    Editorial: LAP LAMBERT Academic Publishing, 2017

    3330331798 / 9783330331792

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    Librería: moluna, Greven, Alemaniamoluna

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    Condición: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Krishnasamy Natarajan VijeyakumarK.N.Vijeyakumar has completed his ME in Applied Electronics at GCT, Coimbatore. He has completed his research in CMOS Processor Design for Signal and Image Processing Applications. He has published re.…

  • Idioma: Inglés

    Editorial: LAP LAMBERT Academic Publishing Jun 2017, 2017

    3330331798 / 9783330331792

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    Librería: buchversandmimpf2000, Emtmannsberg, BAYE, Alemaniabuchversandmimpf2000

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    Taschenbuch. Condición: Neu. This item is printed on demand - Print on Demand Titel. Neuware -Approximate computation provide alternate solution to reduce energy consumption of high performance present day DSP application devices. Conventional multiplication and addition techniques consume a lot of energy. In this brief design of approximate arithmetic units for signal processing application is explored. First an approximate adder is proposed by changing the logic of basic full adder cell. The proposed adder cell has fewer transistor count compared to recent similar approach. Next, an approximate multiplier with low error is designed using lead one detection and selecting n/2 bits for an n bit input. The proposed n/2 bit approximate multiplier performs well in terms of error and power performance compared to recent similar approach. In continuation the approximate units are implemented in a Multiply-Accumulate(MAC) unit. The proposed approximate MAC unit provides significant improvement in power, area, and delay at the cost of little degrade in accuracy. Finally, the proposed MAC unit is implemented in filtering application to verify the functionality.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 60 pp. Englisch.…