Librería: Ria Christie Collections, Uxbridge, Reino Unido
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Librería: preigu, Osnabrück, Alemania
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Añadir al carritoTaschenbuch. Condición: Neu. Timed Boolean Functions | A Unified Formalism for Exact Timing Analysis | William K C Lam (u. a.) | Taschenbuch | Einband - flex.(Paperback) | Englisch | 2012 | Springer Us | EAN 9781461361565 | Verantwortliche Person für die EU: Springer Nature Customer Service Center GmbH, Europaplatz 3, 69115 Heidelberg, productsafety[at]springernature[dot]com | Anbieter: preigu.
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Añadir al carritoCondición: New. Timing research in high performance VLSI systems has advanced at a steady pace over the last few years, while tools, especially theoretical mechanisms, lag behind. Much present timing research relies heavily on timing diagrams, which, although intuitive, ar.
Librería: AHA-BUCH GmbH, Einbeck, Alemania
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Añadir al carritoTaschenbuch. Condición: Neu. Druck auf Anfrage Neuware - Printed after ordering - Timing research in high performance VLSI systems has advanced at a steady pace over the last few years, while tools, especially theoretical mechanisms, lag behind. Much present timing research relies heavily on timing diagrams, which, although intuitive, are inadequate for analysis of large designs with many parameters. Further, timing diagrams offer only approximations, not exact solutions, to many timing problems and provide little insight in the cases where temporal properties of a design interact intricately with the design's logical functionalities. This book presents a methodology for timing research which facilitates analy sis and design of circuits and systems in a unified temporal and logical domain. In the first part, we introduce an algebraic representation formalism, Timed Boolean Functions (TBF's), which integrates both logical and timing informa tion of digital circuits and systems into a single formalism. We also give a canonical form, TBF BDD's, for them, which can be used for efficient ma nipulation. In the second part, we apply Timed Boolean Functions to three problems in timing research, for which exact solutions are obtained for the first time: 1. computing the exact delays of combinational circuits and the minimum cycle times of finite state machines, 2. analysis and synthesis of wavepipelining circuits, a high speed architecture for which precise timing relations between signals are essential for correct operations, 3. verification of circuit and system performance and coverage of delay faults by testing.
Librería: Mispah books, Redhill, SURRE, Reino Unido
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Librería: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Alemania
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Añadir al carritoTaschenbuch. Condición: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Timing research in high performance VLSI systems has advanced at a steady pace over the last few years, while tools, especially theoretical mechanisms, lag behind. Much present timing research relies heavily on timing diagrams, which, although intuitive, are inadequate for analysis of large designs with many parameters. Further, timing diagrams offer only approximations, not exact solutions, to many timing problems and provide little insight in the cases where temporal properties of a design interact intricately with the design's logical functionalities. This book presents a methodology for timing research which facilitates analy sis and design of circuits and systems in a unified temporal and logical domain. In the first part, we introduce an algebraic representation formalism, Timed Boolean Functions (TBF's), which integrates both logical and timing informa tion of digital circuits and systems into a single formalism. We also give a canonical form, TBF BDD's, for them, which can be used for efficient ma nipulation. In the second part, we apply Timed Boolean Functions to three problems in timing research, for which exact solutions are obtained for the first time: 1. computing the exact delays of combinational circuits and the minimum cycle times of finite state machines, 2. analysis and synthesis of wavepipelining circuits, a high speed architecture for which precise timing relations between signals are essential for correct operations, 3. verification of circuit and system performance and coverage of delay faults by testing. 300 pp. Englisch.
Librería: Majestic Books, Hounslow, Reino Unido
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Añadir al carritoCondición: New. Print on Demand pp. 300 49:B&W 6.14 x 9.21 in or 234 x 156 mm (Royal 8vo) Perfect Bound on White w/Gloss Lam.
Librería: Biblios, Frankfurt am main, HESSE, Alemania
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Añadir al carritoCondición: New. PRINT ON DEMAND pp. 300.