9781461358091 - quantum transport in ultrasmall devices: proceedings of a nato advanced study institute on quantum transport in ultrasmall devices, held july 17–30, ... ciocco, italy: 342 (nato science series b:) (12 resultados)
- Tapa blanda
Librería: Ria Christie Collections, Uxbridge, Reino UnidoRia Christie Collections
Contactar con el vendedorVendedor de 5 estrellasCondición: Nuevo
EUR 228,03
Envío por EUR 14,03Se envía de Reino Unido a Estados Unidos de AmericaCantidad disponible: Más de 20 disponibles
Condición: New. In.
- Tapa blanda
Librería: Books Puddle, New York, NY, Estados Unidos de AmericaBooks Puddle
Contactar con el vendedorVendedor de 4 estrellasCondición: Nuevo
EUR 286,65
Envío por EUR 3,51Se envía dentro de Estados Unidos de AmericaCantidad disponible: 4 disponibles
Condición: New. pp. 556 Index.
- Más imágenes
- Tapa blanda
Librería: AHA-BUCH GmbH, Einbeck, AlemaniaAHA-BUCH GmbH
Contactar con el vendedorVendedor de 5 estrellasCondición: Nuevo
EUR 225,03
Envío por EUR 65,16Se envía de Alemania a Estados Unidos de AmericaCantidad disponible: 1 disponibles
Taschenbuch. Condición: Neu. Druck auf Anfrage Neuware - Printed after ordering - The operation of semiconductor devices depends upon the use of electrical potential barriers (such as gate depletion) in controlling the carrier densities (electrons and holes) and their transport. Although a successful device design is quite compl…icated and involves many aspects, the device engineering is mostly to devise a 'best' device design by defIning optimal device structures and manipulating impurity profIles to obtain optimal control of the carrier flow through the device. This becomes increasingly diffIcult as the device scale becomes smaller and smaller. Since the introduction of integrated circuits, the number of individual transistors on a single chip has doubled approximately every three years. As the number of devices has grown, the critical dimension of the smallest feature, such as a gate length (which is related to the transport length defIning the channel), has consequently declined. The reduction of this design rule proceeds approximately by a factor of 1. 4 each generation, which means we will be using 0. 1-0. 15 ). lm rules for the 4 Gb chips a decade from now. If we continue this extrapolation, current technology will require 30 nm design rules, and a cell 3 2 size 10 nm , for a 1Tb memory chip by the year 2020. New problems keep hindering the high-performance requirement. Well-known, but older, problems include hot carrier effects, short-channel effects, etc. A potential problem, which illustrates the need for quantum transport, is caused by impurity fluctuations.
- Tapa blanda
Librería: Mispah books, Redhill, SURRE, Reino UnidoMispah books
Contactar con el vendedorVendedor de 4 estrellasCondición: Usado - Como Nuevo
EUR 335,34
Envío por EUR 29,28Se envía de Reino Unido a Estados Unidos de AmericaCantidad disponible: 1 disponibles
Paperback. Condición: Like New. LIKE NEW. SHIPS FROM MULTIPLE LOCATIONS. book.
- Tapa blanda
- Impresión bajo demanda
Librería: Basi6 International, Irving, TX, Estados Unidos de AmericaBasi6 International
Contactar con el vendedorVendedor de 5 estrellasCondición: Nuevo
EUR 178,26
Gastos de envío gratisSe envía dentro de Estados Unidos de AmericaCantidad disponible: 10 disponibles
Condición: Brand New. New. US edition. Print on demand title. Delivery takes 20-25 days. Excellent Customer Service.
- Tapa blanda
- Impresión bajo demanda
Librería: Brook Bookstore On Demand, Napoli, NA, ItaliaBrook Bookstore On Demand
Contactar con el vendedorVendedor de 5 estrellasCondición: Nuevo
EUR 166,29
Envío por EUR 11,00Se envía de Italia a Estados Unidos de AmericaCantidad disponible: Más de 20 disponibles
Condición: new. Questo è un articolo print on demand.
- Más imágenes
Quantum Transport in Ultrasmall Devices
Ferry, David K.|Grubin, Harold L.|Jacoboni, Carlo|Jauho, A.-P.
- Tapa blanda
- Impresión bajo demanda
Librería: moluna, Greven, Alemaniamoluna
Contactar con el vendedorVendedor de 5 estrellasCondición: Nuevo
EUR 180,07
Envío por EUR 48,99Se envía de Alemania a Estados Unidos de AmericaCantidad disponible: Más de 20 disponibles
Condición: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Proceedings of a NATO ASI held in Il Ciocco, Italy, July 17-30, 1994 The operation of semiconductor devices depends upon the use of electrical potential barriers (such as gate depletion) in controlling the carrier den…sities (electrons and holes) an.
- Más imágenes
- Tapa blanda
- Impresión bajo demanda
Librería: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, AlemaniaBuchWeltWeit Ludwig Meier e.K.
Contactar con el vendedorVendedor de 5 estrellasCondición: Nuevo
EUR 213,99
Envío por EUR 23,00Se envía de Alemania a Estados Unidos de AmericaCantidad disponible: 2 disponibles
Taschenbuch. Condición: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -The operation of semiconductor devices depends upon the use of electrical potential barriers (such as gate depletion) in controlling the carrier densities (electrons and holes) and their transport. Although a successful device desig…n is quite complicated and involves many aspects, the device engineering is mostly to devise a 'best' device design by defIning optimal device structures and manipulating impurity profIles to obtain optimal control of the carrier flow through the device. This becomes increasingly diffIcult as the device scale becomes smaller and smaller. Since the introduction of integrated circuits, the number of individual transistors on a single chip has doubled approximately every three years. As the number of devices has grown, the critical dimension of the smallest feature, such as a gate length (which is related to the transport length defIning the channel), has consequently declined. The reduction of this design rule proceeds approximately by a factor of 1. 4 each generation, which means we will be using 0. 1-0. 15 ). lm rules for the 4 Gb chips a decade from now. If we continue this extrapolation, current technology will require 30 nm design rules, and a cell 3 2 size 10 nm , for a 1Tb memory chip by the year 2020. New problems keep hindering the high-performance requirement. Well-known, but older, problems include hot carrier effects, short-channel effects, etc. A potential problem, which illustrates the need for quantum transport, is caused by impurity fluctuations. 556 pp. Englisch.
- Más imágenes
- Tapa blanda
- Impresión bajo demanda
Librería: preigu, Osnabrück, Alemaniapreigu
Contactar con el vendedorVendedor de 5 estrellasCondición: Nuevo
EUR 186,70
Envío por EUR 70,00Se envía de Alemania a Estados Unidos de AmericaCantidad disponible: 5 disponibles
Taschenbuch. Condición: Neu. Quantum Transport in Ultrasmall Devices | Proceedings of a NATO Advanced Study Institute on Quantum Transport in Ultrasmall Devices, held July 17-30, 1994, in II Ciocco, Italy | David K. Ferry (u. a.) | Taschenbuch | NATO Science Series B: | x | Englisch | 2012 | Springer | EAN 9781461358091 | Verant…wortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu Print on Demand.
- Más imágenes
- Tapa blanda
- Impresión bajo demanda
Librería: buchversandmimpf2000, Emtmannsberg, BAYE, Alemaniabuchversandmimpf2000
Contactar con el vendedorVendedor de 5 estrellasCondición: Nuevo
EUR 213,99
Envío por EUR 60,00Se envía de Alemania a Estados Unidos de AmericaCantidad disponible: 1 disponibles
Taschenbuch. Condición: Neu. This item is printed on demand - Print on Demand Titel. Neuware -The operation of semiconductor devices depends upon the use of electrical potential barriers (such as gate depletion) in controlling the carrier densities (electrons and holes) and their transport. Although a successful device design is… quite complicated and involves many aspects, the device engineering is mostly to devise a 'best' device design by defIning optimal device structures and manipulating impurity profIles to obtain optimal control of the carrier flow through the device. This becomes increasingly diffIcult as the device scale becomes smaller and smaller. Since the introduction of integrated circuits, the number of individual transistors on a single chip has doubled approximately every three years. As the number of devices has grown, the critical dimension of the smallest feature, such as a gate length (which is related to the transport length defIning the channel), has consequently declined. The reduction of this design rule proceeds approximately by a factor of 1. 4 each generation, which means we will be using 0. 1-0. 15 ). lm rules for the 4 Gb chips a decade from now. If we continue this extrapolation, current technology will require 30 nm design rules, and a cell 3 2 sizeSpringer-Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 556 pp. Englisch.
- Tapa blanda
- Impresión bajo demanda
Librería: Majestic Books, Hounslow, Reino UnidoMajestic Books
Contactar con el vendedorVendedor de 4 estrellasCondición: Nuevo
EUR 300,99
Envío por EUR 7,61Se envía de Reino Unido a Estados Unidos de AmericaCantidad disponible: 4 disponibles
Condición: New. Print on Demand pp. 556 66:B&W 7 x 10 in or 254 x 178 mm Perfect Bound on White w/Gloss Lam.
- Tapa blanda
- Impresión bajo demanda
Librería: Biblios, frankfurt am main, HESSE, AlemaniaBiblios
Contactar con el vendedorVendedor de 4 estrellasCondición: Nuevo
EUR 304,45
Envío por EUR 9,95Se envía de Alemania a Estados Unidos de AmericaCantidad disponible: 4 disponibles
Condición: New. PRINT ON DEMAND pp. 556.
