Isbn: 9786130308063 (3 resultados)

ISBN
Refinar con la Búsqueda avanzada

Filtrar la búsqueda

  • Libros (3)

  • Nuevo (3)

a

Intervalo de precios personalizado (EUR)

a

    • Editorial: VDM Verlag Dr. Müller E.K. Dez 2009, 2009

      613030806X / 9786130308063

      • Tapa blanda
      • Impresión bajo demanda

      Librería: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, AlemaniaBuchWeltWeit Ludwig Meier e.K.

      Vendedor de 5 estrellas
      Contactar con el vendedor

      Condición: Nuevo

      EUR 34,00

      Envío por EUR 23,00 
      Se envía de Alemania a Estados Unidos de America

      Cantidad disponible: 2 disponibles

      Taschenbuch. Condición: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Please note that the content of this book primarily consists of articles available from Wikipedia or other free sources online.The acronym RISC, for reduced instruction set computer, represents a CPU design strategy emphasizing the insight that simplified instructions that 'do less' may still provide for higher performance if this simplicity can be utilized to make instructions execute very quickly. Many proposals for a 'precise' definition have been attempted, and the term is being slowly replaced by the more descriptive load-store architecture. Well known RISC families include Alpha, ARC, ARM, AVR, MIPS, PA-RISC, Power Architecture, SuperH, and SPARC. Englisch.

    • Editorial: OmniScriptum, 2026

      613030806X / 9786130308063

      • Tapa blanda
      • Impresión bajo demanda

      Librería: preigu, Osnabrück, Alemaniapreigu

      Vendedor de 5 estrellas
      Contactar con el vendedor

      Condición: Nuevo

      EUR 109,85

      Envío por EUR 70,00 
      Se envía de Alemania a Estados Unidos de America

      Cantidad disponible: 5 disponibles

      Taschenbuch. Condición: Neu. Reduced Instruction Set Computer | Addressing Mode, Complex Instruction Set Computer, Very Long Instruction Word, Minimal Instruction Set Computer | Lambert M. Surhone (u. a.) | Taschenbuch | Englisch | 2026 | OmniScriptum | EAN 9786130308063 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu Print on Demand.

    • Editorial: Omniscriptum

      613030806X / 9786130308063

      • Tapa blanda
      • Impresión bajo demanda

      Librería: AHA-BUCH GmbH, Einbeck, AlemaniaAHA-BUCH GmbH

      Vendedor de 5 estrellas
      Contactar con el vendedor

      Condición: Nuevo

      EUR 189,66

      Envío por EUR 30,50 
      Se envía de Alemania a Estados Unidos de America

      Cantidad disponible: 1 disponibles

      Taschenbuch. Condición: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Please note that the content of this book primarily consists of articles available from Wikipedia or other free sources online.The acronym RISC, for reduced instruction set computer, represents a CPU design strategy emphasizing the insight that simplified instructions that 'do less' may still provide for higher performance if this simplicity can be utilized to make instructions execute very quickly. Many proposals for a 'precise' definition have been attempted, and the term is being slowly replaced by the more descriptive load-store architecture. Well known RISC families include Alpha, ARC, ARM, AVR, MIPS, PA-RISC, Power Architecture, SuperH, and SPARC.