9783847336525 - hardware support for efficient transactional memory systems: hardware techniques for high-performance transactional memory in many-core chip multiprocessors de titos-gil, ruben (6 resultados)
- Tapa blanda
Librería: preigu, Osnabrück, Alemaniapreigu
Contactar con el vendedorVendedor de 5 estrellasCondición: Nuevo
EUR 66,40
Envío por EUR 70,00Se envía de Alemania a Estados Unidos de AmericaCantidad disponible: 5 disponibles
Taschenbuch. Condición: Neu. Hardware Support for Efficient Transactional Memory Systems | Hardware Techniques for High-Performance Transactional Memory in Many-Core Chip Multiprocessors | Ruben Titos-Gil | Taschenbuch | 212 S. | Englisch | 2012 | LAP LAMBERT Academic Publishing | EAN 9783847336525 | Verantwortliche Person für d…ie EU: BoD - Books on Demand, In de Tarpen 42, 22848 Norderstedt, info[at]bod[dot]de | Anbieter: preigu.
- Tapa blanda
Librería: Mispah books, Redhill, SURRE, Reino UnidoMispah books
Contactar con el vendedorVendedor de 4 estrellasCondición: Usado - Como Nuevo
EUR 174,36
Envío por EUR 28,99Se envía de Reino Unido a Estados Unidos de AmericaCantidad disponible: 1 disponibles
Paperback. Condición: Like New. LIKE NEW. SHIPS FROM MULTIPLE LOCATIONS. book.
- Tapa blanda
- Impresión bajo demanda
Librería: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, AlemaniaBuchWeltWeit Ludwig Meier e.K.
Contactar con el vendedorVendedor de 5 estrellasCondición: Nuevo
EUR 79,00
Envío por EUR 23,00Se envía de Alemania a Estados Unidos de AmericaCantidad disponible: 2 disponibles
Taschenbuch. Condición: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -The rise of multicores has brought the problem of effective concurrent programming to the forefront of computing research, presenting both immense opportunities and enormous challenges. Traditional multithreaded programming models u…se low-level primitives such as locks to guarantee mutual exclusion and protect shared data. The trade-off between programming ease and performance imposed by locks remains one of the key challenges to programmers and computer architects of the multicore era. Transactional Memory (TM) is a conceptually simpler programming model that can help boost developer productivity by eliminating the complex task of reasoning about the intricacies of safe fine-grained locking. Fast implementations of transactional programming constructs are necessary for TM to gain widespread usage. This book focuses on the hardware mechanisms that provide optimistic concurrency control with stringent guarantees of atomicity and isolation, with the intent of achieving high-performance across a variety of workloads, at a reasonable cost in terms of design complexity. 212 pp. Englisch.
- Tapa blanda
- Impresión bajo demanda
Librería: moluna, Greven, Alemaniamoluna
Contactar con el vendedorVendedor de 5 estrellasCondición: Nuevo
EUR 63,42
Envío por EUR 48,99Se envía de Alemania a Estados Unidos de AmericaCantidad disponible: Más de 20 disponibles
Condición: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Titos-Gil RubenDr. Ruben Titos-Gil is a post-doc researcher at the Chalmers University of Technology in Sweden. He earned a PhD Degree from the University of Murcia, Spain. His research interests includ…e parallel computer architectur.
- Tapa blanda
- Impresión bajo demanda
Librería: buchversandmimpf2000, Emtmannsberg, BAYE, Alemaniabuchversandmimpf2000
Contactar con el vendedorVendedor de 5 estrellasCondición: Nuevo
EUR 79,00
Envío por EUR 60,00Se envía de Alemania a Estados Unidos de AmericaCantidad disponible: 1 disponibles
Taschenbuch. Condición: Neu. This item is printed on demand - Print on Demand Titel. Neuware -The rise of multicores has brought the problem of effective concurrent programming to the forefront of computing research, presenting both immense opportunities and enormous challenges. Traditional multithreaded programming models use l…ow-level primitives such as locks to guarantee mutual exclusion and protect shared data. The trade-off between programming ease and performance imposed by locks remains one of the key challenges to programmers and computer architects of the multicore era. Transactional Memory (TM) is a conceptually simpler programming model that can help boost developer productivity by eliminating the complex task of reasoning about the intricacies of safe fine-grained locking. Fast implementations of transactional programming constructs are necessary for TM to gain widespread usage. This book focuses on the hardware mechanisms that provide optimistic concurrency control with stringent guarantees of atomicity and isolation, with the intent of achieving high-performance across a variety of workloads, at a reasonable cost in terms of design complexity.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 212 pp. Englisch.
- Tapa blanda
- Impresión bajo demanda
Librería: AHA-BUCH GmbH, Einbeck, AlemaniaAHA-BUCH GmbH
Contactar con el vendedorVendedor de 5 estrellasCondición: Nuevo
EUR 79,00
Envío por EUR 61,67Se envía de Alemania a Estados Unidos de AmericaCantidad disponible: 1 disponibles
Taschenbuch. Condición: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - The rise of multicores has brought the problem of effective concurrent programming to the forefront of computing research, presenting both immense opportunities and enormous challenges. Traditional multithreaded programming models use lo…w-level primitives such as locks to guarantee mutual exclusion and protect shared data. The trade-off between programming ease and performance imposed by locks remains one of the key challenges to programmers and computer architects of the multicore era. Transactional Memory (TM) is a conceptually simpler programming model that can help boost developer productivity by eliminating the complex task of reasoning about the intricacies of safe fine-grained locking. Fast implementations of transactional programming constructs are necessary for TM to gain widespread usage. This book focuses on the hardware mechanisms that provide optimistic concurrency control with stringent guarantees of atomicity and isolation, with the intent of achieving high-performance across a variety of workloads, at a reasonable cost in terms of design complexity.
