9783846588475 - high-k dielectrics and metal gates for memory applications: investigation of high-k dielectrics and metal gate electrodes for floating gate non-volatile memory applications de jayanti, srikant (6 resultados)
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Taschenbuch. Condición: Neu. High-k Dielectrics and Metal Gates for Memory Applications | Investigation of High-k Dielectrics and Metal Gate Electrodes for Floating Gate Non-Volatile Memory Applications | Srikant Jayanti | Taschenbuch | 252 S. | Englisch | 2012 | LAP LAMBERT Academic Publishing | EAN 9783846588475 | Verantwortli…che Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu.
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Librería: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, , AlemaniaBuchWeltWeit Ludwig Meier e.K.
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Taschenbuch. Condición: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Due to the increasing demand of non-volatile flash memories in the portable electronics, the device structures need to be scaled down drastically. However, the scalability of traditional floating gate structures beyond 20 nm NAND fl…ash technology node is uncertain. In this regard, the use of metal gates and high-k dielectrics as the gate and interpoly dielectrics respectively, seem to be promising substitutes in order to continue the flash scaling beyond 20nm. Furthermore, research of novel memory structures to overcome the scaling challenges need to be explored. Through this work, the use of high-k dielectrics as IPDs in a memory structure has been studied. For this purpose, IPD process optimization and barrier engineering were explored to determine and improve the memory performance. Specifically, the concept of high-k / low-k barrier engineering was studied in corroboration with simulations. In addition, a novel memory structure comprising a continuous metal floating gate was investigated in combination with high-k blocking oxides. Both electrical and analytical characterization studies were undertaken to gain insight into the behavior of the memory layers in the structure. 252 pp. Englisch.
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Librería: buchversandmimpf2000, Emtmannsberg, BAYE, Alemaniabuchversandmimpf2000
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Taschenbuch. Condición: Neu. This item is printed on demand - Print on Demand Titel. Neuware -Due to the increasing demand of non-volatile flash memories in the portable electronics, the device structures need to be scaled down drastically. However, the scalability of traditional floating gate structures beyond 20 nm NAND flash…technology node is uncertain. In this regard, the use of metal gates and high-k dielectrics as the gate and interpoly dielectrics respectively, seem to be promising substitutes in order to continue the flash scaling beyond 20nm. Furthermore, research of novel memory structures to overcome the scaling challenges need to be explored. Through this work, the use of high-k dielectrics as IPDs in a memory structure has been studied. For this purpose, IPD process optimization and barrier engineering were explored to determine and improve the memory performance. Specifically, the concept of high-k / low-k barrier engineering was studied in corroboration with simulations. In addition, a novel memory structure comprising a continuous metal floating gate was investigated in combination with high-k blocking oxides. Both electrical and analytical characterization studies were undertaken to gain insight into the behavior of the memory layers in the structure.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 252 pp. Englisch.
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Librería: AHA-BUCH GmbH, Einbeck, AlemaniaAHA-BUCH GmbH
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Taschenbuch. Condición: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Due to the increasing demand of non-volatile flash memories in the portable electronics, the device structures need to be scaled down drastically. However, the scalability of traditional floating gate structures beyond 20 nm NAND flash t…echnology node is uncertain. In this regard, the use of metal gates and high-k dielectrics as the gate and interpoly dielectrics respectively, seem to be promising substitutes in order to continue the flash scaling beyond 20nm. Furthermore, research of novel memory structures to overcome the scaling challenges need to be explored. Through this work, the use of high-k dielectrics as IPDs in a memory structure has been studied. For this purpose, IPD process optimization and barrier engineering were explored to determine and improve the memory performance. Specifically, the concept of high-k / low-k barrier engineering was studied in corroboration with simulations. In addition, a novel memory structure comprising a continuous metal floating gate was investigated in combination with high-k blocking oxides. Both electrical and analytical characterization studies were undertaken to gain insight into the behavior of the memory layers in the structure.
