Atlantis press aug 2013 (6 resultados)
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Librería: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, , AlemaniaBuchWeltWeit Ludwig Meier e.K.
Contactar con el vendedorVendedor de 5 estrellasCondición: Nuevo
EUR 53,49
Envío por EUR 23,00Se envía de Alemania a Estados Unidos de AmericaCantidad disponible: 2 disponibles
Buch. Condición: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This monograph treats normally hyperbolic invariant manifolds, with a focus on noncompactness. These objects generalize hyperbolic fixed points and are ubiquitous in dynamical systems.First, normally hyperbolic invariant manifolds and thei…r relation to hyperbolic fixed points and center manifolds, as well as, overviews of history and methods of proofs are presented. Furthermore, issues (such as uniformity and bounded geometry) arising due to noncompactness are discussed in great detail with examples.The main new result shown is a proof of persistence for noncompact normally hyperbolic invariant manifolds in Riemannian manifolds of bounded geometry. This extends well-known results by Fenichel and Hirsch, Pugh and Shub, and is complementary to noncompactness results in Banach spaces by Bates, Lu and Zeng. Along the way, some new results in bounded geometry are obtained and a framework is developed to analyze ODEs in a differential geometric context.Finally, the main result is extended to time and parameter dependent systems and overflowing invariant manifolds. 204 pp. Englisch.
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Librería: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, , AlemaniaBuchWeltWeit Ludwig Meier e.K.
Contactar con el vendedorVendedor de 5 estrellasCondición: Nuevo
EUR 53,49
Envío por EUR 23,00Se envía de Alemania a Estados Unidos de AmericaCantidad disponible: 2 disponibles
Buch. Condición: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -System on chips designs have evolved from fairly simple unicore, single memory designs to complex heterogeneous multicore SoC architectures consisting of a large number of IP blocks on the same silicon. To meet high computational demands p…osed by latest consumer electronic devices, most current systems are based on such paradigm, which represents a real revolution in many aspects in computing.The attraction of multicore processing for power reduction is compelling. By splitting a set of tasks among multiple processor cores, the operating frequency necessary for each core can be reduced, allowing to reduce the voltage on each core. Because dynamic power is proportional to the frequency and to the square of the voltage, we get a big gain, even though we may have more cores running.As more and more cores are integrated into these designs to share the ever increasing processing load, the main challenges lie in efficient memory hierarchy, scalable system interconnect, new programming paradigms, and efficient integration methodology for connecting such heterogeneous cores into a single system capable of leveraging their individual flexibility.Current design methods tend toward mixed HW/SW co-designs targeting multicore systems on-chip for specific applications. To decide on the lowest cost mix of cores, designers must iteratively map the device's functionality to a particular HW/SW partition and target architectures. In addition, to connect the heterogeneous cores, the architecture requires high performance complex communication architectures and efficient communication protocols, such as hierarchical bus, point-to-point connection, or Network-on-Chip.Software development also becomes far more complex due to the difficulties in breaking a single processing task into multiple parts that can be processed separately and then reassembled later. This reflects the fact that certain processor jobs cannot be easily parallelized to run concurrently on multiple processing cores and that load balancing between processing cores - especially heterogeneous cores - is very difficult. 300 pp. Englisch.
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Librería: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, , AlemaniaBuchWeltWeit Ludwig Meier e.K.
Contactar con el vendedorVendedor de 5 estrellasCondición: Nuevo
EUR 53,49
Envío por EUR 23,00Se envía de Alemania a Estados Unidos de AmericaCantidad disponible: 2 disponibles
Buch. Condición: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -In this monograph we introduce and examine four new temporal logic formalisms that can be used as specification languages for the automated verification of the reliability of hardware and software designs with respect to a desired behavior…. The work is organized in two parts. In the first part two logics for computations, the graded computation tree logic and the computation tree logic with minimal model quantifiers are discussed. These have proved to be useful in describing correct executions of monolithic closed systems. The second part focuses on logics for strategies, strategy logic and memoryful alternating-time temporal logic, which have been successfully applied to formalize several properties of interactive plays in multi-entities systems modeled as multi-agent games. 168 pp. Englisch.
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Librería: buchversandmimpf2000, Emtmannsberg, BAYE, Alemaniabuchversandmimpf2000
Contactar con el vendedorVendedor de 5 estrellasCondición: Nuevo
EUR 53,49
Envío por EUR 60,00Se envía de Alemania a Estados Unidos de AmericaCantidad disponible: 1 disponibles
Buch. Condición: Neu. This item is printed on demand - Print on Demand Titel. Neuware -This monograph treats normally hyperbolic invariant manifolds, with a focus on noncompactness. These objects generalize hyperbolic fixed points and are ubiquitous in dynamical systems.First, normally hyperbolic invariant manifolds and their re…lation to hyperbolic fixed points and center manifolds, as well as, overviews of history and methods of proofs are presented. Furthermore, issues (such as uniformity and bounded geometry) arising due to noncompactness are discussed in great detail with examples.The main new result shown is a proof of persistence for noncompact normally hyperbolic invariant manifolds in Riemannian manifolds of bounded geometry. This extends well-known results by Fenichel and Hirsch, Pugh and Shub, and is complementary to noncompactness results in Banach spaces by Bates, Lu and Zeng. Along the way, some new results in bounded geometry are obtained and a framework is developed to analyze ODEs in a differential geometric context.Finally, the main result is extended to time and parameter dependent systems and overflowing invariant manifolds.Springer-Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 204 pp. Englisch.
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Librería: buchversandmimpf2000, Emtmannsberg, BAYE, Alemaniabuchversandmimpf2000
Contactar con el vendedorVendedor de 5 estrellasCondición: Nuevo
EUR 53,49
Envío por EUR 60,00Se envía de Alemania a Estados Unidos de AmericaCantidad disponible: 1 disponibles
Buch. Condición: Neu. This item is printed on demand - Print on Demand Titel. Neuware -In this monograph we introduce and examine four new temporal logic formalisms that can be used as specification languages for the automated verification of the reliability of hardware and software designs with respect to a desired behavior. Th…e work is organized in two parts. In the first part two logics for computations, the graded computation tree logic and the computation tree logic with minimal model quantifiers are discussed. These have proved to be useful in describing correct executions of monolithic closed systems. The second part focuses on logics for strategies, strategy logic and memoryful alternating-time temporal logic, which have been successfully applied to formalize several properties of interactive plays in multi-entities systems modeled as multi-agent games.Springer-Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 168 pp. Englisch.
- Tapa dura
- Impresión bajo demanda
Librería: buchversandmimpf2000, Emtmannsberg, BAYE, Alemaniabuchversandmimpf2000
Contactar con el vendedorVendedor de 5 estrellasCondición: Nuevo
EUR 53,49
Envío por EUR 60,00Se envía de Alemania a Estados Unidos de AmericaCantidad disponible: 1 disponibles
Buch. Condición: Neu. This item is printed on demand - Print on Demand Titel. Neuware -System on chips designs have evolved from fairly simple unicore, single memory designs to complex heterogeneous multicore SoC architectures consisting of a large number of IP blocks on the same silicon. To meet high computational demands posed… by latest consumer electronic devices, most current systems are based on such paradigm, which represents a real revolution in many aspects in computing.The attraction of multicore processing for power reduction is compelling. By splitting a set of tasks among multiple processor cores, the operating frequency necessary for each core can be reduced, allowing to reduce the voltage on each core. Because dynamic power is proportional to the frequency and to the square of the voltage, we get a big gain, even though we may have more cores running.As more and more cores are integrated into these designs to share the ever increasing processing load, the main challenges lie in efficient memory hierarchy, scalable system interconnect, new programming paradigms, and efficient integration methodology for connecting such heterogeneous cores into a single system capable of leveraging their individual flexibility.Current design methods tend toward mixed HW/SW co-designs targeting multicore systems on-chip for specific applications. To decide on the lowest cost mix of cores, designers must iteratively map the device¿s functionality to a particular HW/SW partition and target architectures. In addition, to connect the heterogeneous cores, the architecture requires high performance complex communication architectures and efficient communication protocols, such as hierarchical bus, point-to-point connection, or Network-on-Chip.Software development also becomes far more complex due to the difficulties in breaking a single processing task into multiple parts that can be processed separately and then reassembled later. This reflects the fact that certain processor jobs cannot be easily parallelized to run concurrently on multiple processingcores and that load balancing between processing cores ¿ especially heterogeneous cores ¿ is very difficult.Springer-Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 300 pp. Englisch.
