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  • Idioma: Inglés

    Editorial: Elsevier Science Nov 2007, 2007

    0123706165 / 9780123706164

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    Librería: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, AlemaniaBuchWeltWeit Ludwig Meier e.K.

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    Condición: Nuevo

    EUR 76,95

    Envío por EUR 23,00 
    Se envía de Alemania a Estados Unidos de America

    Cantidad disponible: 2 disponibles

    Buch. Condición: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book will explain how to verify SoC (Systems on Chip) logic designs using 'formal? and 'semiformal? verification techniques. The critical issue to be addressed is whether the functionality of the design is the one that the designers intended. Simulation has been used for checking the correctness of SoC designs (as in 'functional? verification), but many subtle design errors cannot be caught by simulation. Recently, formal verification, giving mathematical proof of the correctness of designs, has been gaining popularity.For higher design productivity, it is essential to debug designs as early as possible, which this book facilitates. This book covers all aspects of high-level formal and semiformal verification techniques for system level designs. 256 pp. Englisch.…