VLSI Fault Modeling and Testing Techniques: (VLSI Design Automation Series)

Zobrist, George W.

ISBN 10: 0893917818 ISBN 13: 9780893917814

Editorial: Praeger, 1993

Idioma: Ingl�s

Condici�n: Usado - Bueno Encuadernaci�n de tapa dura

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Detalles bibliogr�ficos

T�tulo

VLSI Fault Modeling and Testing Techniques: (VLSI Design Automation Series)

Editor

Praeger

Fecha de publicaci�n

1993

Idioma

Ingl�s

ISBN 10

0893917818

ISBN 13

9780893917814

Encuadernaci�n

hardcover

Estado

Very Good

Cat�logos de vendedores

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Sinopsis

VLSI systems are becoming very complex and difficult to test. Traditional stuck-at fault problems may be inadequate to model possible manufacturing defects in the integrated ciruit. Hierarchial models are needed that are easy to use at the transistor and functional levels. Stuck-open faults present severe testing problems in CMOS circuits, to overcome testing problems testable designs are utilized. Bridging faults are important due to the shrinking geometry of ICs. BIST PLA schemes have common features-controllability and observability - which are enhanced through additional logic and test points. Certain circuit topologies are more easily testable than others. The amount of reconvergent fan-out is a critical factor in determining realistic measures for determining test generation difficulty. Test implementation is usually left until after the VLSI data path has been synthesized into a structural description. This leads to investigation methodologies for performing design synthesis with test incorporation. These topics and more are discussed.

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brist /f George /i W.

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