T�tulo: Integrated System-level Modeling of Network-on-chip Enabled Multi-processor Platforms
Editor: Springer
Fecha de publicaci�n: 2006
Idioma: Ingl�s
ISBN 10: 1402048254
ISBN 13: 9781402048258
Encuadernaci�n: Encuadernaci�n de tapa dura
Estado: New

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Sinopsis

Integrated System-Level Modeling of Network-on-Chip Enabled Multi-Processor Platforms first gives a comprehensive update on recent developments in the area of SoC platforms and ESL design methodologies. The main contribution is the rigorous definition of a framework for modeling at the timing approximate level of abstraction. Subsequently this book presents a set of tools for the creation and exploration of timing approximate SoC platform models.

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From the reviews:

"The book covers most of the major areas of system-level design and modeling, and much of the work described has been incorporated into a commercial ESL tool ... . This book’s scope and range of pragmatic ideas make it valuable for a wide audience. ... When combined with the extensive list of references (260!), this is a very valuable resource for anyone interested in the area ... . It should resonate with students, researchers, and practical designers ... ." (Grant Martin, IEEE Design and Test of Computers, May-June, 2007)

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