Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms - Tapa dura

Meyr, Heinrich; Leupers, Rainer; Kogel, Tim

 
9781402048258: Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms

Sinopsis

Integrated System-Level Modeling of Network-on-Chip Enabled Multi-Processor Platforms first gives a comprehensive update on recent developments in the area of SoC platforms and ESL design methodologies. The main contribution is the rigorous definition of a framework for modeling at the timing approximate level of abstraction. Subsequently this book presents a set of tools for the creation and exploration of timing approximate SoC platform models.

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Críticas

From the reviews:

"The book covers most of the major areas of system-level design and modeling, and much of the work described has been incorporated into a commercial ESL tool ... . This book’s scope and range of pragmatic ideas make it valuable for a wide audience. ... When combined with the extensive list of references (260!), this is a very valuable resource for anyone interested in the area ... . It should resonate with students, researchers, and practical designers ... ." (Grant Martin, IEEE Design and Test of Computers, May-June, 2007)

Reseña del editor

Integrated System-Level Modeling of Network-on-Chip Enabled Multi-Processor Platforms first gives a comprehensive update on recent developments in the area of SoC platforms and ESL design methodologies. The main contribution is the rigorous definition of a framework for modeling at the timing approximate level of abstraction. Subsequently this book presents a set of tools for the creation and exploration of timing approximate SoC platform models.

"Sobre este título" puede pertenecer a otra edición de este libro.

Otras ediciones populares con el mismo título

9789048172023: Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms

Edición Destacada

ISBN 10:  9048172020 ISBN 13:  9789048172023
Editorial: Springer, 2010
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