The IEEE international workshop on Defect & Fault-Tolerance in VLSI Systems, Proceedings, 1995.

IEEE Computer Society.

ISBN 10: 0818671076 ISBN 13: 9780818671074

Editorial: IEEE Computer Society Press, Los Alamitos, 1995

Idioma: Ingl�s

Condici�n: Usado - Bueno Encuadernaci�n de tapa dura

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Illustrated in black and white. 305 pages VG. Slight shelf wear to covers, overall very good condition.

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T�tulo

The IEEE international workshop on Defect & Fault-Tolerance in VLSI Systems, Proceedings, 1995.

Editor

IEEE Computer Society Press, Los Alamitos

Fecha de publicaci�n

1995

Idioma

Ingl�s

ISBN 10

0818671076

ISBN 13

9780818671074

Encuadernaci�n

hard cover

Estado

Bueno

Estado de la sobrecubierta

No Jacket

Cat�logos de vendedores

engineering and technology

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Sinopsis

An invited talk recounts Intel's experience with increasing die yield through CAD algorithms, and a panel discussion examines tools for the extracting of critical areas for a yield analysis of VLSI design. Others of the 34 papers cover critical area analysis, defect sensitivity and reliability, fault tolerant architectures and arrays, yield projection and enhancement, fault tolerant and testing techniques, and self-checking and coding techniques. No subject index. Annotation copyright Book News, Inc. Portland, Or.

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