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Sinopsis
Logic circuits are becoming increasingly susceptible to probabilistic behavior caused by external radiation and process variation. In addition, inherently probabilistic quantum- and nano-technologies are on the horizon as we approach the limits of CMOS scaling. Ensuring the reliability of such circuits despite the probabilistic behavior is a key challenge in IC design---one that necessitates a fundamental, probabilistic reformulation of synthesis and testing techniques. This monograph will present techniques for analyzing, designing, and testing logic circuits with probabilistic behavior.
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De la contraportada
Integrated circuits (ICs) increasingly exhibit uncertain characteristics due to soft errors, inherently probabilistic devices, and manufacturing variability. As device technologies scale, these effects can be detrimental to the reliability of logic circuits. To improve future semiconductor designs, this book describes methods for analyzing, designing, and testing circuits subject to probabilistic effects. The authors first develop techniques to model inherently probabilistic methods in logic circuits and to test circuits for determining their reliability after they are manufactured. Then, they study error-masking mechanisms intrinsic to digital circuits and show how to leverage them to design more reliable circuits. The book describes techniques for:
• Modeling and reasoning about probabilistic behavior in logic circuits, including a matrix-based reliability-analysis framework;
• Accurate analysis of soft-error rate (SER) based on functional-simulation, sufficiently scalable for use in gate-level optimizations;
• Logic synthesis for greater resilience against soft errors, which improves reliability using moderate overhead in area and performance;
• Test-generation and test-compaction methods aimed at probabilistic faults in logic circuits that facilitate accurate and efficient post-manufacture measurement of soft-error susceptibility.
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- EditorialSpringer
- Año de publicación2012
- ISBN 10 9048196434
- ISBN 13 9789048196432
- EncuadernaciónTapa dura
- IdiomaInglés
- Número de páginas136
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Design, Analysis and Test of Logic Circuits Under Uncertainty.
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ISBN 10: 9048196434
ISBN 13: 9789048196432
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XI, 123 p. 71 illus. Hardcover. Versand aus Deutschland / We dispatch from Germany via Air Mail. Einband bestoßen, daher Mängelexemplar gestempelt, sonst sehr guter Zustand. Imperfect copy due to slightly bumped cover, apart from this in very good condition. Stamped. Stamped. Lecture Notes in Electrical Engineering Bd. 115. Sprache: Englisch. Nº de ref. del artículo: 4730GB
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Design, Analysis and Test of Logic Circuits Under Uncertainty
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Springer Netherlands, 2012
ISBN 10: 9048196434
ISBN 13: 9789048196432
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Design, Analysis and Test of Logic Circuits under Uncertainty
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Gebunden. Condición: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Presents a comprehensive overview of Logic CircuitsCombines theory with practical examplesMulti-discipline approach to the hot topic of uncertaintyLogic circuits are becoming increasingly susceptible to probabilistic behavior caus. Nº de ref. del artículo: 5822667
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Design, Analysis and Test of Logic Circuits Under Uncertainty
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Springer Netherlands Sep 2012, 2012
ISBN 10: 9048196434
ISBN 13: 9789048196432
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Librería: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Alemania
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Buch. Condición: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Integrated circuits (ICs) increasingly exhibit uncertain characteristics due to soft errors, inherently probabilistic devices, and manufacturing variability. As device technologies scale, these effects can be detrimental to the reliability of logic circuits. To improve future semiconductor designs, this book describes methods for analyzing, designing, and testing circuits subject to probabilistic effects. The authors first develop techniques to model inherently probabilistic methods in logic circuits and to test circuits for determining their reliability after they are manufactured. Then, they study error-masking mechanisms intrinsic to digital circuits and show how to leverage them to design more reliable circuits. The book describes techniques for: Modeling and reasoning about probabilistic behavior in logic circuits, including a matrix-based reliability-analysis framework; Accurate analysis of soft-error rate (SER) based on functional-simulation, sufficiently scalable for use in gate-level optimizations; Logic synthesis for greater resilience against soft errors, which improves reliability using moderate overhead in area and performance; Test-generation and test-compaction methods aimed at probabilistic faults in logic circuits that facilitate accurate and efficient post-manufacture measurement of soft-error susceptibility. 136 pp. Englisch. Nº de ref. del artículo: 9789048196432
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Design, Analysis and Test of Logic Circuits Under Uncertainty (Lecture Notes in Electrical Engineering, 115)
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Design, Analysis and Test of Logic Circuits Under Uncertainty
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Springer Netherlands, Springer Netherlands, 2012
ISBN 10: 9048196434
ISBN 13: 9789048196432
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Librería: AHA-BUCH GmbH, Einbeck, Alemania
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Buch. Condición: Neu. Druck auf Anfrage Neuware - Printed after ordering - Integrated circuits (ICs) increasingly exhibit uncertain characteristics due to soft errors, inherently probabilistic devices, and manufacturing variability. As device technologies scale, these effects can be detrimental to the reliability of logic circuits. To improve future semiconductor designs, this book describes methods for analyzing, designing, and testing circuits subject to probabilistic effects. The authors first develop techniques to model inherently probabilistic methods in logic circuits and to test circuits for determining their reliability after they are manufactured. Then, they study error-masking mechanisms intrinsic to digital circuits and show how to leverage them to design more reliable circuits. The book describes techniques for: Modeling and reasoning about probabilistic behavior in logic circuits, including a matrix-based reliability-analysis framework; Accurate analysis of soft-error rate (SER) based on functional-simulation, sufficiently scalable for use in gate-level optimizations; Logic synthesis for greater resilience against soft errors, which improves reliability using moderate overhead in area and performance; Test-generation and test-compaction methods aimed at probabilistic faults in logic circuits that facilitate accurate and efficient post-manufacture measurement of soft-error susceptibility. Nº de ref. del artículo: 9789048196432
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Design, Analysis and Test of Logic Circuits Under Uncertainty
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Condición: New. pp. 136. Nº de ref. del artículo: 263611686
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Design, Analysis and Test of Logic Circuits Under Uncertainty
Impresión bajo demandaLibrería: Majestic Books, Hounslow, Reino Unido
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Condición: New. Print on Demand pp. 136 71 Illus. Nº de ref. del artículo: 4236281
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Design, Analysis and Test of Logic Circuits Under Uncertainty (Lecture Notes in Electrical Engineering, 115)
Librería: California Books, Miami, FL, Estados Unidos de America
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Condición: New. Nº de ref. del artículo: I-9789048196432
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Design, Analysis and Test of Logic Circuits Under Uncertainty
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Springer Netherlands, Springer Netherlands Sep 2012, 2012
ISBN 10: 9048196434
ISBN 13: 9789048196432
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Librería: buchversandmimpf2000, Emtmannsberg, BAYE, Alemania
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Buch. Condición: Neu. Neuware -Logic circuits are becoming increasingly susceptible to probabilistic behavior caused by external radiation and process variation. In addition, inherently probabilistic quantum- and nano-technologies are on the horizon as we approach the limits of CMOS scaling. Ensuring the reliability of such circuits despite the probabilistic behavior is a key challenge in IC design---one that necessitates a fundamental, probabilistic reformulation of synthesis and testing techniques. This monograph will present techniques for analyzing, designing, and testing logic circuits with probabilistic behavior.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 136 pp. Englisch. Nº de ref. del artículo: 9789048196432
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