Design of Low Leakage SRAM - Tapa blanda

Tripathi, Rajan Prasad; Verma, Rahul Kumar

 
9786139907861: Design of Low Leakage SRAM
Tapa blanda
ISBN 10: 6139907861 ISBN 13: 9786139907861
Editorial: LAP LAMBERT Academic Publishing, 2018

Sinopsis

The most research on the power consumption of circuits has been concentrated on the switching power and the power dissipated by the leakage current has been the relatively minor area. However, in the current VLSI process, the sub-threshold current becomes one of the major factors of the power consumption, especially in high-end memory. To reduce the leakage power in the SRAM, the power gating method can be applied and a major technique of the power gating is using sleep transistors to control the sub-threshold current. In this project, dual threshold voltages are adopted; normal SRAM cells have lower threshold voltages and the higher threshold voltages control the sleep transistors. The size of sleep transistors can be chosen by the worst case current and are applied to every block.

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Editorial
LAP LAMBERT Academic Publishing
Año de publicación
2018
Idioma
Inglés
ISBN 10 
6139907861
ISBN 13 
9786139907861
Encuadernación
Tapa blanda
Número de páginas
56
Contacto del fabricante
no disponible
Persona responsable
no disponible