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Sinopsis
High-Level Power Analysis and Optimization presents a comprehensive description of power analysis and optimization techniques at the higher (architecture and behavior) levels of the design hierarchy, which are often the levels that yield the most power savings. This book describes power estimation and optimization techniques for use during high-level (behavioral synthesis), as well as for designs expressed at the register-transfer or architecture level.
High-Level Power Analysis and Optimization surveys the state-of-the-art research on the following topics: power estimation/macromodeling techniques for architecture-level designs, high-level power management techniques, and high-level synthesis optimizations for low power.
High-Level Power Analysis and Optimization will be very useful reading for students, researchers, designers, design methodology developers, and EDA tool developers who are interested in low-power VLSI design or high-level design methodologies.
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High-Level Power Analysis and Optimization presents a comprehensive description of power analysis and optimization techniques at the higher (architecture and behavior) levels of the design hierarchy, which are often the levels that yield the most power savings. This book describes power estimation and optimization techniques for use during high-level (behavioral synthesis), as well as for designs expressed at the register-transfer or architecture level.
High-Level Power Analysis and Optimization surveys the state-of-the-art research on the following topics: power estimation/macromodeling techniques for architecture-level designs, high-level power management techniques, and high-level synthesis optimizations for low power.
High-Level Power Analysis and Optimization will be very useful reading for students, researchers, designers, design methodology developers, and EDA tool developers who are interested in low-power VLSI design or high-level design methodologies.
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High-Level Power Analysis and Optimization
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High-Level Power Analysis and Optimization (Paperback)
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ISBN 13: 9781461374817
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Paperback. Condición: new. Paperback. High-Level Power Analysis and Optimization presents a comprehensive description of power analysis and optimization techniques at the higher (architecture and behavior) levels of the design hierarchy, which are often the levels that yield the most power savings. This book describes power estimation and optimization techniques for use during high-level (behavioral synthesis), as well as for designs expressed at the register-transfer or architecture level. High-Level Power Analysis and Optimization surveys the state-of-the-art research on the following topics: power estimation/macromodeling techniques for architecture-level designs, high-level power management techniques, and high-level synthesis optimizations for low power. High-Level Power Analysis and Optimization will be very useful reading for students, researchers, designers, design methodology developers, and EDA tool developers who are interested in low-power VLSI design or high-level design methodologies. High-Level Power Analysis and Optimization presents a comprehensive description of power analysis and optimization techniques at the higher (architecture and behavior) levels of the design hierarchy, which are often the levels that yield the most power savings. Shipping may be from multiple locations in the US or from the UK, depending on stock availability. Nº de ref. del artículo: 9781461374817
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High-Level Power Analysis and Optimization
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ISBN 10: 1461374812
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Taschenbuch. Condición: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -High-Level Power Analysis and Optimization presents a comprehensive description of power analysis and optimization techniques at the higher (architecture and behavior) levels of the design hierarchy, which are often the levels that yield the most power savings. This book describes power estimation and optimization techniques for use during high-level (behavioral synthesis), as well as for designs expressed at the register-transfer or architecture level. High-Level Power Analysis and Optimization surveys the state-of-the-art research on the following topics: power estimation/macromodeling techniques for architecture-level designs, high-level power management techniques, and high-level synthesis optimizations for low power. High-Level Power Analysis and Optimization will be very useful reading for students, researchers, designers, design methodology developers, and EDA tool developers who are interested in low-power VLSI design or high-level design methodologies. 200 pp. Englisch. Nº de ref. del artículo: 9781461374817
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Condición: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. High-Level Power Analysis and Optimization presents a comprehensive description of power analysis and optimization techniques at the higher (architecture and behavior) levels of the design hierarchy, which are often the levels that yield the mos. Nº de ref. del artículo: 4195614
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