Test Generation for Very Large Scale Integration Chips - Tapa dura

Agrawal, Vishwani D.; Seth, S.C.

 
9780818687860: Test Generation for Very Large Scale Integration Chips

Sinopsis

Reprints of papers taken from 18 different journals, published between 1967 and 1987. They give a comprehensive overview of very large-scale integration testing. No significant prior experience in testing is assumed. Concepts and current practices are emphasized. Chapters are preceded by a tutorial. Graphs and illustrations are featured in most pages. Topics include fault modeling, test generation, test evaluation, testability analysis, design for testability, and automatic test equipment. Annotation copyright Book News, Inc. Portland, Or.

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Reseña del editor

Reprints of papers taken from 18 different journals, published between 1967 and 1987. They give a comprehensive overview of very large-scale integration testing. No significant prior experience in testing is assumed. Concepts and current practices are emphasized. Chapters are preceded by a tutorial.

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