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Añadir al carritoCondición: New. pp. 452 Softcover reprint of the original 1st ed. 2011 edition NO-PA16APR2015-KAP.
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Añadir al carritoCondición: Gut. Zustand: Gut | Seiten: 460 | Sprache: Englisch | Produktart: Bücher | This book is about digital system testing and testable design. The concepts of testing and testability are treated together with digital design practices and methodologies. The book uses Verilog models and testbenches for implementing and explaining fault simulation and test generation algorithms. Extensive use of Verilog and Verilog PLI for test applications is what distinguishes this book from other test and testability books. Verilog eliminates ambiguities in test algorithms and BIST and DFT hardware architectures, and it clearly describes the architecture of the testability hardware and its test sessions. Describing many of the on-chip decompression algorithms in Verilog helps to evaluate these algorithms in terms of hardware overhead and timing, and thus feasibility of using them for System-on-Chip designs. Extensive use of testbenches and testbench development techniques is another unique feature of this book. Using PLI in developing testbenches and virtual testers provides a powerful programming tool, interfaced with hardware described in Verilog. This mixed hardware/software environment facilitates description of complex test programs and test strategies.
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Añadir al carritoCondición: Sehr gut. Zustand: Sehr gut | Seiten: 435 | Sprache: Englisch | Produktart: Bücher | Keine Beschreibung verfügbar.
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Añadir al carritoCondición: New. pp. 460.
Idioma: Inglés
Publicado por Springer US, Springer US, 2016
ISBN 10: 1489979271 ISBN 13: 9781489979278
Librería: AHA-BUCH GmbH, Einbeck, Alemania
EUR 90,34
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Añadir al carritoTaschenbuch. Condición: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book is about digital system testing and testable design. The concepts of testing and testability are treated together with digital design practices and methodologies. The book uses Verilog models and testbenches for implementing and explaining fault simulation and test generation algorithms.Extensive use of Verilog and Verilog PLI for test applications is what distinguishes this book from other test and testability books. Verilog eliminates ambiguities in test algorithms and BIST and DFT hardware architectures, and it clearly describes the architecture of the testability hardware and its test sessions. Describing many of the on-chip decompression algorithms in Verilog helps to evaluate these algorithms in terms of hardware overhead and timing, and thus feasibility of using them for System-on-Chip designs. Extensive use of testbenches and testbench development techniques is another unique feature of this book. Using PLI in developing testbenches and virtual testers provides a powerful programming tool, interfaced with hardware described in Verilog. This mixed hardware/software environment facilitates description of complex test programs and test strategies.
Librería: AHA-BUCH GmbH, Einbeck, Alemania
EUR 127,15
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Añadir al carritoBuch. Condición: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book is about digital system testing and testable design. The concepts of testing and testability are treated together with digital design practices and methodologies. The book uses Verilog models and testbenches for implementing and explaining fault simulation and test generation algorithms.Extensive use of Verilog and Verilog PLI for test applications is what distinguishes this book from other test and testability books. Verilog eliminates ambiguities in test algorithms and BIST and DFT hardware architectures, and it clearly describes the architecture of the testability hardware and its test sessions. Describing many of the on-chip decompression algorithms in Verilog helps to evaluate these algorithms in terms of hardware overhead and timing, and thus feasibility of using them for System-on-Chip designs. Extensive use of testbenches and testbench development techniques is another unique feature of this book. Using PLI in developing testbenches and virtual testers provides a powerful programming tool, interfaced with hardware described in Verilog. This mixed hardware/software environment facilitates description of complex test programs and test strategies.
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Librería: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Alemania
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Añadir al carritoTaschenbuch. Condición: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book is about digital system testing and testable design. The concepts of testing and testability are treated together with digital design practices and methodologies. The book uses Verilog models and testbenches for implementing and explaining fault simulation and test generation algorithms.Extensive use of Verilog and Verilog PLI for test applications is what distinguishes this book from other test and testability books. Verilog eliminates ambiguities in test algorithms and BIST and DFT hardware architectures, and it clearly describes the architecture of the testability hardware and its test sessions. Describing many of the on-chip decompression algorithms in Verilog helps to evaluate these algorithms in terms of hardware overhead and timing, and thus feasibility of using them for System-on-Chip designs. Extensive use of testbenches and testbench development techniques is another unique feature of this book. Using PLI in developing testbenches and virtual testers provides a powerful programming tool, interfaced with hardware described in Verilog. This mixed hardware/software environment facilitates description of complex test programs and test strategies. 460 pp. Englisch.
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Librería: moluna, Greven, Alemania
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Añadir al carritoCondición: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. About the AuthorDr. Zainalabedin Navabi is a professor of electrical and computer engineering at Worcester Polytechnic Institute. Dr. Navabi is the author of several textbooks and computer based trainings on VHDL, Verilog and related tools and environments.
Librería: Biblios, Frankfurt am main, HESSE, Alemania
EUR 114,20
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Añadir al carritoCondición: New. PRINT ON DEMAND pp. 452.
Idioma: Inglés
Publicado por Springer-Verlag New York Inc., 2016
ISBN 10: 1489979271 ISBN 13: 9781489979278
Librería: THE SAINT BOOKSTORE, Southport, Reino Unido
EUR 106,50
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Añadir al carritoPaperback / softback. Condición: New. This item is printed on demand. New copy - Usually dispatched within 5-9 working days.
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Publicado por SPRINGER NATURE Dez 2010, 2010
ISBN 10: 1441975470 ISBN 13: 9781441975478
Librería: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Alemania
EUR 117,69
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Añadir al carritoBuch. Condición: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book is about digital system testing and testable design. The concepts of testing and testability are treated together with digital design practices and methodologies. The book uses Verilog models and testbenches for implementing and explaining fault simulation and test generation algorithms.Extensive use of Verilog and Verilog PLI for test applications is what distinguishes this book from other test and testability books. Verilog eliminates ambiguities in test algorithms and BIST and DFT hardware architectures, and it clearly describes the architecture of the testability hardware and its test sessions. Describing many of the on-chip decompression algorithms in Verilog helps to evaluate these algorithms in terms of hardware overhead and timing, and thus feasibility of using them for System-on-Chip designs. Extensive use of testbenches and testbench development techniques is another unique feature of this book. Using PLI in developing testbenches and virtual testers provides a powerful programming tool, interfaced with hardware described in Verilog. This mixed hardware/software environment facilitates description of complex test programs and test strategies. 435 pp. Englisch.
Idioma: Inglés
Publicado por Springer, Humana Aug 2016, 2016
ISBN 10: 1489979271 ISBN 13: 9781489979278
Librería: buchversandmimpf2000, Emtmannsberg, BAYE, Alemania
EUR 85,59
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Añadir al carritoTaschenbuch. Condición: Neu. This item is printed on demand - Print on Demand Titel. Neuware -Describes test methods in Verilog and PLI, which makes the methods more understandable and the gates possible to simulateSimulation of gate models allows fault simulation and test generation, while Verilog testbenches inject faults, evaluate fault coverage and apply new test patternsDescribes DFT, compression, decompression, and BIST techniques in Verilog, which makes the hardware of the architectures easier to understand and allows simulation and evaluation of the testability methodsSpringer-Verlag KG, Sachsenplatz 4-6, 1201 Wien 460 pp. Englisch.
Librería: moluna, Greven, Alemania
EUR 101,85
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Añadir al carritoGebunden. Condición: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. About the AuthorDr. Zainalabedin Navabi is a professor of electrical and computer engineering at Worcester Polytechnic Institute. Dr. Navabi is the author of several textbooks and computer based trainings on VHDL, Verilog and related tools and environments.
Librería: Majestic Books, Hounslow, Reino Unido
EUR 152,80
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Añadir al carritoCondición: New. Print on Demand pp. 460 68:B&W 7 x 10 in or 254 x 178 mm Case Laminate on White w/Gloss Lam.
Librería: Biblios, Frankfurt am main, HESSE, Alemania
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Añadir al carritoCondición: New. PRINT ON DEMAND pp. 460.