9783844304190 - ASIC Design for a Coherent Optical Receiver DSPU: Design issues related to high-speed MOS ASIC for a coherent optical QPSK with polarization multiplex receiver DSPU... (6 resultados)

Taschenbuch. Condición: Neu. ASIC Design for a Coherent Optical Receiver DSPU | Design issues related to high-speed MOS ASIC for a coherent optical QPSK with polarization multiplex receiver DSPU | Vijitha Rohana Herath | Taschenbuch | 112 S. | Englisch | 2011 | LAP LAMBERT Academic Publishing | EAN 9783844304190 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu.

Paperback. Condición: Like New. LIKE NEW. SHIPS FROM MULTIPLE LOCATIONS. book.

Taschenbuch. Condición: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -The exponential growth of the internet traffic makes it necessary to increase the transmission capacity of the backbone optical transmission system. The coherent optical quadrature PSK (QPSK) with polarization multiplex quadruple channel capacity over the intensity modulation scheme. This upgrades existing 10 Gbit/s links to 40 Gbit/s. This book introduces you to the practicle implementation of the receiver DSPU ASIC of such a system. Chapter 1 introduces the design problem. Chapter 2 starts with an introduction to the optical synchronous QPSK transmission systems and discusses the carrier & data recovery algorithms. Chapter 2 concludes with an introduction to the DSPU ASIC architecture. Chapter 3 discusses the implementation of the DSPU ASIC. The chapter starts with an introduction to the 130 nm technology node and then discuss transmission line implementation issues, DSPU input interface design, and the full DSPU implementation. Finally, test results are presented. Chapter 4 introduces a novel clock skew estimation algorithm. This algorithm calculates the clock skew when process variations and nonuniform temparature varitions are present. 112 pp. Englisch.

Condición: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Herath Vijitha RohanaDr. Vijitha R. Herath received BS(EE)from the University of Peradeniya, Sri Lanka, MS(ECE) from the University of Miami, USA, and Dr. -Ing. (EE) from the University of Paderborn, Germany. He is a member of IEE.

Taschenbuch. Condición: Neu. This item is printed on demand - Print on Demand Titel. Neuware -The exponential growth of the internet traffic makes it necessary to increase the transmission capacity of the backbone optical transmission system. The coherent optical quadrature PSK (QPSK) with polarization multiplex quadruple channel capacity over the intensity modulation scheme. This upgrades existing 10 Gbit/s links to 40 Gbit/s. This book introduces you to the practicle implementation of the receiver DSPU ASIC of such a system. Chapter 1 introduces the design problem. Chapter 2 starts with an introduction to the optical synchronous QPSK transmission systems and discusses the carrier & data recovery algorithms. Chapter 2 concludes with an introduction to the DSPU ASIC architecture. Chapter 3 discusses the implementation of the DSPU ASIC. The chapter starts with an introduction to the 130 nm technology node and then discuss transmission line implementation issues, DSPU input interface design, and the full DSPU implementation. Finally, test results are presented. Chapter 4 introduces a novel clock skew estimation algorithm. This algorithm calculates the clock skew when process variations and nonuniform temparature varitions are present.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 112 pp. Englisch.

Taschenbuch. Condición: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - The exponential growth of the internet traffic makes it necessary to increase the transmission capacity of the backbone optical transmission system. The coherent optical quadrature PSK (QPSK) with polarization multiplex quadruple channel capacity over the intensity modulation scheme. This upgrades existing 10 Gbit/s links to 40 Gbit/s. This book introduces you to the practicle implementation of the receiver DSPU ASIC of such a system. Chapter 1 introduces the design problem. Chapter 2 starts with an introduction to the optical synchronous QPSK transmission systems and discusses the carrier & data recovery algorithms. Chapter 2 concludes with an introduction to the DSPU ASIC architecture. Chapter 3 discusses the implementation of the DSPU ASIC. The chapter starts with an introduction to the 130 nm technology node and then discuss transmission line implementation issues, DSPU input interface design, and the full DSPU implementation. Finally, test results are presented. Chapter 4 introduces a novel clock skew estimation algorithm. This algorithm calculates the clock skew when process variations and nonuniform temparature varitions are present.