9783838301280 - CMOS VLSI LOW-POWER DESIGN: DESIGN METHODOLOGY AND IMPLEMENTATION OF LOW-POWER ASYNCHRONOUS VITERBI DECODERS FOR WIRELESS APPLICATIONS de ELKAWOKGY, MOHAMED (6 resultados)

Taschenbuch. Condición: Neu. CMOS VLSI LOW-POWER DESIGN | DESIGN METHODOLOGY AND IMPLEMENTATION OF LOW-POWER ASYNCHRONOUS VITERBI DECODERS FOR WIRELESS APPLICATIONS | Mohamed Elkawokgy | Taschenbuch | 120 S. | Englisch | 2009 | LAP LAMBERT Academic Publishing | EAN 9783838301280 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu.

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Taschenbuch. Condición: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Power dissipation is a critical parameter in digital design for the implementation of high performance portable, battery operated systems, such as wireless communications systems. Clocked or synchronous digital designs consume a significant amount of power associated with coordinating the operation of millions of transistors at GHz clock rates. Besides, the operating speed of such systems is limited by the slowest functional logic unit. By contrast, asynchronous designs are active only when doing useful work, enabling considerable savings in power and operating at the average speed of all components. Yet, the overhead associated with the asynchronous control units implementing the handshaking protocol, in terms of silicon area, speed and power, as well as the lack of Computer Aided Design (CAD) tools for use in such designs have limited the use of asynchronous techniques. In this book, the author describes the concept and challenges of asynchronous VLSI CMOS circuit design and presents a complete design methodology to overcome such challenges via the design and implementation of a 64-state, 1/2-rate Viterbi decoder suitable for wireless communications applications. 120 pp. Englisch.

Condición: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Power dissipation is a critical parameter in digital design for the implementation of high performance portable, battery operated systems, such as wireless communications systems. Clocked or synchronous digital designs consume a significant amount of power .

Taschenbuch. Condición: Neu. This item is printed on demand - Print on Demand Titel. Neuware -Power dissipation is a critical parameter in digital design for the implementation of high performance portable, battery operated systems, such as wireless communications systems. Clocked or synchronous digital designs consume a significant amount of power associated with coordinating the operation of millions of transistors at GHz clock rates. Besides, the operating speed of such systems is limited by the slowest functional logic unit. By contrast, asynchronous designs are active only when doing useful work, enabling considerable savings in power and operating at the average speed of all components. Yet, the overhead associated with the asynchronous control units implementing the handshaking protocol, in terms of silicon area, speed and power, as well as the lack of Computer Aided Design (CAD) tools for use in such designs have limited the use of asynchronous techniques. In this book, the author describes the concept and challenges of asynchronous VLSI CMOS circuit design and presents a complete design methodology to overcome such challenges via the design and implementation of a 64-state, 1/2-rate Viterbi decoder suitable for wireless communications applications.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 120 pp. Englisch.

Taschenbuch. Condición: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Power dissipation is a critical parameter in digital design for the implementation of high performance portable, battery operated systems, such as wireless communications systems. Clocked or synchronous digital designs consume a significant amount of power associated with coordinating the operation of millions of transistors at GHz clock rates. Besides, the operating speed of such systems is limited by the slowest functional logic unit. By contrast, asynchronous designs are active only when doing useful work, enabling considerable savings in power and operating at the average speed of all components. Yet, the overhead associated with the asynchronous control units implementing the handshaking protocol, in terms of silicon area, speed and power, as well as the lack of Computer Aided Design (CAD) tools for use in such designs have limited the use of asynchronous techniques. In this book, the author describes the concept and challenges of asynchronous VLSI CMOS circuit design and presents a complete design methodology to overcome such challenges via the design and implementation of a 64-state, 1/2-rate Viterbi decoder suitable for wireless communications applications.