9781461288985 - wafer-level integrated systems: implementation issues: 70 (the springer international series in engineering and computer science) de tewksbury, stuart k. k. (8 resultados)
- Tapa blanda
Librería: Hamelyn, Madrid, M, EspañaHamelyn
Contactar con el vendedorVendedor de 5 estrellasCondición: Usado - Aceptable
EUR 97,49
Envío por EUR 12,99Se envía de España a Estados Unidos de AmericaCantidad disponible: 1 disponibles
Condición: Good. : Este libro trata sobre los sistemas integrados a nivel de oblea y los problemas de implementación relacionados. Cubre temas de ingeniería, sistemas informáticos y arquitectura VLSI. Es una publicación de Springer US y forma parte de la serie Kluwer International Series in Engineering and Computer Science. EAN:… 9781461288985 Tipo: Libros Categoría: Tecnología|Ciencias Título: Wafer-Level Integrated Systems Autor: Stuart K. Tewksbury Editorial: Springer US Idioma: en Páginas: 480 Formato: Tapa blanda Año de publicación: 1989.
- Tapa blanda
Librería: California Books, Miami, FL, Estados Unidos de AmericaCalifornia Books
Contactar con el vendedorVendedor de 5 estrellasCondición: Nuevo
EUR 179,59
Gastos de envío gratisSe envía dentro de Estados Unidos de AmericaCantidad disponible: Más de 20 disponibles
Condición: New.
- Tapa blanda
Librería: Ria Christie Collections, Uxbridge, Reino UnidoRia Christie Collections
Contactar con el vendedorVendedor de 5 estrellasCondición: Nuevo
EUR 165,23
Envío por EUR 13,94Se envía de Reino Unido a Estados Unidos de AmericaCantidad disponible: Más de 20 disponibles
Condición: New. In.
- Tapa blanda
Librería: AHA-BUCH GmbH, Einbeck, AlemaniaAHA-BUCH GmbH
Contactar con el vendedorVendedor de 5 estrellasCondición: Nuevo
EUR 168,73
Envío por EUR 63,58Se envía de Alemania a Estados Unidos de AmericaCantidad disponible: 1 disponibles
Taschenbuch. Condición: Neu. Druck auf Anfrage Neuware - Printed after ordering - From the perspective of complex systems, conventional Ie's can be regarded as 'discrete' devices interconnected according to system design objectives imposed at the circuit board level and higher levels in the system implementation hierarchy. Howev…er, silicon monolithic circuits have progressed to such complex functions that a transition from a philosophy of integrated circuits (Ie's) to one of integrated sys tems is necessary. Wafer-scale integration has played an important role over the past few years in highlighting the system level issues which will most significantly impact the implementation of complex monolithic systems and system components. Rather than being a revolutionary approach, wafer-scale integration will evolve naturally from VLSI as defect avoidance, fault tolerance and testing are introduced into VLSI circuits. Successful introduction of defect avoidance, for example, relaxes limits imposed by yield and cost on Ie dimensions, allowing the monolithic circuit's area to be chosen according to the natural partitioning of a system into individual functions rather than imposing area limits due to defect densities. The term 'wafer level' is perhaps more appropriate than 'wafer-scale'. A 'wafer-level' monolithic system component may have dimensions ranging from conventional yield-limited Ie dimensions to full wafer dimensions. In this sense, 'wafer-scale' merely represents the obvious upper practical limit imposed by wafer sizes on the area of monolithic circuits. The transition to monolithic, wafer-level integrated systems will require a mapping of the full range of system design issues onto the design of monolithic circuit.
- Tapa blanda
Librería: Mispah books, Redhill, SURRE, Reino UnidoMispah books
Contactar con el vendedorVendedor de 4 estrellasCondición: Usado - Como Nuevo
EUR 257,72
Envío por EUR 29,09Se envía de Reino Unido a Estados Unidos de AmericaCantidad disponible: 1 disponibles
Paperback. Condición: Like New. LIKE NEW. SHIPS FROM MULTIPLE LOCATIONS. book.
- Tapa blanda
- Impresión bajo demanda
Librería: Brook Bookstore On Demand, Napoli, NA, ItaliaBrook Bookstore On Demand
Contactar con el vendedorVendedor de 5 estrellasCondición: Nuevo
EUR 126,26
Envío por EUR 6,80Se envía de Italia a Estados Unidos de AmericaCantidad disponible: Más de 20 disponibles
Condición: new. Questo è un articolo print on demand.
- Tapa blanda
- Impresión bajo demanda
Librería: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, AlemaniaBuchWeltWeit Ludwig Meier e.K.
Contactar con el vendedorVendedor de 5 estrellasCondición: Nuevo
EUR 192,55
Envío por EUR 23,00Se envía de Alemania a Estados Unidos de AmericaCantidad disponible: 2 disponibles
Taschenbuch. Condición: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -From the perspective of complex systems, conventional Ie's can be regarded as 'discrete' devices interconnected according to system design objectives imposed at the circuit board level and higher levels in the system implementation…hierarchy. However, silicon monolithic circuits have progressed to such complex functions that a transition from a philosophy of integrated circuits (Ie's) to one of integrated sys tems is necessary. Wafer-scale integration has played an important role over the past few years in highlighting the system level issues which will most significantly impact the implementation of complex monolithic systems and system components. Rather than being a revolutionary approach, wafer-scale integration will evolve naturally from VLSI as defect avoidance, fault tolerance and testing are introduced into VLSI circuits. Successful introduction of defect avoidance, for example, relaxes limits imposed by yield and cost on Ie dimensions, allowing the monolithic circuit's area to be chosen according to the natural partitioning of a system into individual functions rather than imposing area limits due to defect densities. The term 'wafer level' is perhaps more appropriate than 'wafer-scale'. A 'wafer-level' monolithic system component may have dimensions ranging from conventional yield-limited Ie dimensions to full wafer dimensions. In this sense, 'wafer-scale' merely represents the obvious upper practical limit imposed by wafer sizes on the area of monolithic circuits. The transition to monolithic, wafer-level integrated systems will require a mapping of the full range of system design issues onto the design of monolithic circuit. 476 pp. Englisch.
- Tapa blanda
- Impresión bajo demanda
Librería: buchversandmimpf2000, Emtmannsberg, BAYE, Alemaniabuchversandmimpf2000
Contactar con el vendedorVendedor de 5 estrellasCondición: Nuevo
EUR 160,49
Envío por EUR 60,00Se envía de Alemania a Estados Unidos de AmericaCantidad disponible: 1 disponibles
Taschenbuch. Condición: Neu. This item is printed on demand - Print on Demand Titel. Neuware -From the perspective of complex systems, conventional Ie's can be regarded as 'discrete' devices interconnected according to system design objectives imposed at the circuit board level and higher levels in the system implementation hier…archy. However, silicon monolithic circuits have progressed to such complex functions that a transition from a philosophy of integrated circuits (Ie's) to one of integrated sys tems is necessary. Wafer-scale integration has played an important role over the past few years in highlighting the system level issues which will most significantly impact the implementation of complex monolithic systems and system components. Rather than being a revolutionary approach, wafer-scale integration will evolve naturally from VLSI as defect avoidance, fault tolerance and testing are introduced into VLSI circuits. Successful introduction of defect avoidance, for example, relaxes limits imposed by yield and cost on Ie dimensions, allowing the monolithic circuit's area to be chosen according to the natural partitioning of a system into individual functions rather than imposing area limits due to defect densities. The term 'wafer level' is perhaps more appropriate than 'wafer-scale'. A 'wafer-level' monolithic system component may have dimensions ranging from conventional yield-limited Ie dimensions to full wafer dimensions. In this sense, 'wafer-scale' merely represents the obvious upper practical limit imposed by wafer sizes on the area of monolithic circuits. The transition to monolithic, wafer-level integrated systems will require a mapping of the full range of system design issues onto the design of monolithic circuit.Springer-Verlag KG, Sachsenplatz 4-6, 1201 Wien 476 pp. Englisch.
