ISBN: 9781333937294 - designing vlsi network nodes to reduce memory traffic in a shared memory parallel computer (classic reprint) (3 resultados)

PAP. Condición: New. New Book. Shipped from UK. Established seller since 2000.

PAP. Condición: New. New Book. Shipped from UK. Established seller since 2000.

Paperback. Condición: New. Print on Demand. This book delves into the challenges of designing a parallel computer's network nodes. The text positions the detailed study of designing shared memory parallel computers within the broader context of computer engineering and the need to enhance computation speed. The author explores the design of enhanced buffered crossbars and the concept of 'fetch-and-add,' an operation for coordinating tasks in parallel systems. Thematic depth emerges from the insights gained on node design to reduce memory traffic, efficiently manage multiple requests, and prevent serialization. The author also examines architectural features, performance requirements, packaging limitations, and their interplay. The book concludes with a discussion on the significance of combining messages in network nodes, a key technique for improving the overall performance of shared memory parallel computers. This book is a reproduction of an important historical work, digitally reconstructed using state-of-the-art technology to preserve the original format. In rare cases, an imperfection in the original, such as a blemish or missing page, may be replicated in the book. print-on-demand item.…