9780470685716 - ESD: Design and Synthesis de Voldman, Steven H. (15 resultados)

Condición: New.

Condición: New.

Condición: As New. Unread book in perfect condition.

HRD. Condición: New. New Book. Shipped from UK. Established seller since 2000.

Hardcover. Condición: new. Hardcover. Electrostatic discharge (ESD) continues to impact semiconductor components and systems as technologies scale from micro- to nano-electronics. This book studies electrical overstress, ESD, and latchup from a whole-chip ESD design synthesis approach. It provides a clear insight into the integration of ESD protection networks from a generalist perspective, followed by examples in specific technologies, circuits, and chips. Uniquely both the semiconductor chip integration issues and floorplanning of ESD networks are covered from a top-down' design approach. Look inside for extensive coverage on: integration of cores, power bussing, and signal pins in DRAM, SRAM, CMOS image processing chips, microprocessors, analog products, RF components and how the integration influences ESD design and integrationarchitecturing of mixed voltage, mixed signal, to RF design for ESD analysisfloorplanning for peripheral and core I/O designs, and the implications on ESD and latchupguard ring integration for both a bottom-up' and top-down' methodology addressing I/O guard rings, ESD guard rings, I/O to I/O, and I/O to coreclassification of ESD power clamps and ESD signal pin circuitry, and how to make the correct choice for a given semiconductor chipexamples of ESD design for the state-of-the-art technologies discussed, including CMOS, BiCMOS, silicon on insulator (SOI), bipolar technology, high voltage CMOS (HVCMOS), RF CMOS, and smart powerpractical methods for the understanding of ESD circuit power distribution, ground rule development, internal bus distribution, current path analysis, quality metrics ESD: Design and Synthesis is a continuation of the author's series of books on ESD protection. It is an essential reference for: ESD, circuit, and semiconductor engineers; design synthesis team leaders; layout design, characterisation, floorplanning, test and reliability engineers; technicians; and groundrule and test site developers in the manufacturing and design of semiconductor chips. It is also useful for graduate and undergraduate students in electrical engineering, semiconductor sciences, and manufacturing sciences, and on courses involving the design of ESD devices, chips and systems. This book offers a useful insight into the issues that confront modern technology as we enter the nano-electronic era. Focused on fundamentals of ESD design to construct and integrate a semiconductor chip, this book enables ESD engineers to build better products by exploring the areas of ESD design synthesis, I/O design and integration, semiconductor chip architecture, floor planning, power bus design, and ESD power clamps. Shipping may be from multiple locations in the US or from the UK, depending on stock availability.

Condición: New.

Condición: As New. Unread book in perfect condition.

Hardback. Condición: New. New copy - Usually dispatched within 4 working days.

Condición: New. 2011. 1st Edition. Hardcover. . . . . .

Condición: New. Brand new! Please provide a physical shipping address.

Condición: New. pp. xx + 270 Illus.

Hardcover. Condición: Brand New. 1st edition. 290 pages. 9.84x6.85x0.87 inches. In Stock.

Condición: New. 2011. 1st Edition. Hardcover. . . . . . Books ship from the US and Ireland.

Hardcover. Condición: new. Hardcover. Electrostatic discharge (ESD) continues to impact semiconductor components and systems as technologies scale from micro- to nano-electronics. This book studies electrical overstress, ESD, and latchup from a whole-chip ESD design synthesis approach. It provides a clear insight into the integration of ESD protection networks from a generalist perspective, followed by examples in specific technologies, circuits, and chips. Uniquely both the semiconductor chip integration issues and floorplanning of ESD networks are covered from a top-down' design approach. Look inside for extensive coverage on: integration of cores, power bussing, and signal pins in DRAM, SRAM, CMOS image processing chips, microprocessors, analog products, RF components and how the integration influences ESD design and integrationarchitecturing of mixed voltage, mixed signal, to RF design for ESD analysisfloorplanning for peripheral and core I/O designs, and the implications on ESD and latchupguard ring integration for both a bottom-up' and top-down' methodology addressing I/O guard rings, ESD guard rings, I/O to I/O, and I/O to coreclassification of ESD power clamps and ESD signal pin circuitry, and how to make the correct choice for a given semiconductor chipexamples of ESD design for the state-of-the-art technologies discussed, including CMOS, BiCMOS, silicon on insulator (SOI), bipolar technology, high voltage CMOS (HVCMOS), RF CMOS, and smart powerpractical methods for the understanding of ESD circuit power distribution, ground rule development, internal bus distribution, current path analysis, quality metrics ESD: Design and Synthesis is a continuation of the author's series of books on ESD protection. It is an essential reference for: ESD, circuit, and semiconductor engineers; design synthesis team leaders; layout design, characterisation, floorplanning, test and reliability engineers; technicians; and groundrule and test site developers in the manufacturing and design of semiconductor chips. It is also useful for graduate and undergraduate students in electrical engineering, semiconductor sciences, and manufacturing sciences, and on courses involving the design of ESD devices, chips and systems. This book offers a useful insight into the issues that confront modern technology as we enter the nano-electronic era. Focused on fundamentals of ESD design to construct and integrate a semiconductor chip, this book enables ESD engineers to build better products by exploring the areas of ESD design synthesis, I/O design and integration, semiconductor chip architecture, floor planning, power bus design, and ESD power clamps. Shipping may be from our UK warehouse or from our Australian or US warehouses, depending on stock availability.

Hardcover. Condición: new. Hardcover. Electrostatic discharge (ESD) continues to impact semiconductor components and systems as technologies scale from micro- to nano-electronics. This book studies electrical overstress, ESD, and latchup from a whole-chip ESD design synthesis approach. It provides a clear insight into the integration of ESD protection networks from a generalist perspective, followed by examples in specific technologies, circuits, and chips. Uniquely both the semiconductor chip integration issues and floorplanning of ESD networks are covered from a top-down' design approach. Look inside for extensive coverage on: integration of cores, power bussing, and signal pins in DRAM, SRAM, CMOS image processing chips, microprocessors, analog products, RF components and how the integration influences ESD design and integrationarchitecturing of mixed voltage, mixed signal, to RF design for ESD analysisfloorplanning for peripheral and core I/O designs, and the implications on ESD and latchupguard ring integration for both a bottom-up' and top-down' methodology addressing I/O guard rings, ESD guard rings, I/O to I/O, and I/O to coreclassification of ESD power clamps and ESD signal pin circuitry, and how to make the correct choice for a given semiconductor chipexamples of ESD design for the state-of-the-art technologies discussed, including CMOS, BiCMOS, silicon on insulator (SOI), bipolar technology, high voltage CMOS (HVCMOS), RF CMOS, and smart powerpractical methods for the understanding of ESD circuit power distribution, ground rule development, internal bus distribution, current path analysis, quality metrics ESD: Design and Synthesis is a continuation of the author's series of books on ESD protection. It is an essential reference for: ESD, circuit, and semiconductor engineers; design synthesis team leaders; layout design, characterisation, floorplanning, test and reliability engineers; technicians; and groundrule and test site developers in the manufacturing and design of semiconductor chips. It is also useful for graduate and undergraduate students in electrical engineering, semiconductor sciences, and manufacturing sciences, and on courses involving the design of ESD devices, chips and systems. This book offers a useful insight into the issues that confront modern technology as we enter the nano-electronic era. Focused on fundamentals of ESD design to construct and integrate a semiconductor chip, this book enables ESD engineers to build better products by exploring the areas of ESD design synthesis, I/O design and integration, semiconductor chip architecture, floor planning, power bus design, and ESD power clamps. Shipping may be from our Sydney, NSW warehouse or from our UK or US warehouse, depending on stock availability.