This item is printed on demand - it takes 3-4 days longer - Neuware -This book presents the perspective of the project on a Paradigm Unifying System Specification Environments for proven Electronic design (PUS SEE) as conceived in the course of the research during 2002 -2003. The initial statement of the research was formulated as follows: The objective of PUSSEE is to introduce the formal proof of system properties throughout a modular system design methodology that integrates sub-systems co-verification with system refinement and reusability of virtual system components. This will be done by combining the UML and B languages to allow the verification of system specifications through the composition of proven sub-systems (in particular interfaces, using the VSIAISLIF standard). The link of B with C, VHDL and SystemC will extend the correct-by-construction design process to lower system-on-chip (SoC) development stages. Prototype tools will be developed for the code generation from UML and B, and existing B verification tools will be extended to support IP reuse, according to the VSI Alliance work. The methodology and tools will be validated through the development of three industrial applications: a wireless mobile terminal-a telecom system-on-chip based on HIPERLANI2 protocol and an anti-collision module for automobiles. The problem was known to be hard and the scope ambitious. But the seventeen chapters that follow, describing the main results obtained demonstrate the success of the research, acknowledged by the European reviewers. They are released to allow the largest audience to learn and take benefit of. 312 pp. Englisch.

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Detalles bibliogr�ficos

T�tulo: UML-B Specification for Proven Embedded Systems Design
Editor: Springer US Dez 2010
Fecha de publicaci�n: 2010
Idioma: Ingl�s
ISBN 10: 144195256X
ISBN 13: 9781441952561
Encuadernaci�n: Taschenbuch
Estado: Neu
Dimensiones: 235�mil�metros de ancho por 155 de alto por 17 de largo
Peso: 476 gramos

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Sinopsis

This book presents the perspective of the project on a Paradigm Unifying System Specification Environments for proven Electronic design (PUS SEE) as conceived in the course of the research during 2002 -2003. The initial statement of the research was formulated as follows: The objective of PUSSEE is to introduce the formal proof of system properties throughout a modular system design methodology that integrates sub-systems co-verification with system refinement and reusability of virtual system components. This will be done by combining the UML and B languages to allow the verification of system specifications through the composition of proven sub-systems (in particular interfaces, using the VSIAISLIF standard). The link of B with C, VHDL and SystemC will extend the correct-by-construction design process to lower system-on-chip (SoC) development stages. Prototype tools will be developed for the code generation from UML and B, and existing B verification tools will be extended to supportIP reuse, according to the VSI Alliance work. The methodology and tools will be validated through the development of three industrial applications: a wireless mobile terminal-a telecom system-on-chip based on HIPERLANI2 protocol and an anti-collision module for automobiles. The problem was known to be hard and the scope ambitious. But the seventeen chapters that follow, describing the main results obtained demonstrate the success of the research, acknowledged by the European reviewers. They are released to allow the largest audience to learn and take benefit of.

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This book presents the perspective of the project on a Paradigm Unifying System Specification Environments for proven Electronic design (PUS SEE) as conceived in the course of the research during 2002 -2003. The initial statement of the research was formulated as follows: The objective of PUSSEE is to introduce the formal proof of system properties throughout a modular system design methodology that integrates sub-systems co-verification with system refinement and reusability of virtual system components. This will be done by combining the UML and B languages to allow the verification of system specifications through the composition of proven sub-systems (in particular interfaces, using the VSIAISLIF standard). The link of B with C, VHDL and SystemC will extend the correct-by-construction design process to lower system-on-chip (SoC) development stages. Prototype tools will be developed for the code generation from UML and B, and existing B verification tools will be extended to support IP reuse, according to the VSI Alliance work. The methodology and tools will be validated through the development of three industrial applications: a wireless mobile terminal-a telecom system-on-chip based on HIPERLANI2 protocol and an anti-collision module for automobiles. The problem was known to be hard and the scope ambitious. But the seventeen chapters that follow, describing the main results obtained demonstrate the success of the research, acknowledged by the European reviewers. They are released to allow the largest audience to learn and take benefit of.

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