Druck auf Anfrage Neuware - Printed after ordering - This book presents a study on how thread and data mapping techniques can be used to improve the performance of multi-core architectures.It describes how the memory hierarchy introduces non-uniform memory access, and how mapping can be used to reduce the memory access latency in current hardware architectures.On the software side, this book describes the characteristics present in parallel applications that are used by mapping techniques to improve memory access.Several state-of-the-art methods are analyzed, and the benefits and drawbacks of each one are identified.

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Detalles bibliogr�ficos

T�tulo: Thread and Data Mapping for Multicore Systems : Improving Communication and Memory Accesses
Editor: Springer, Berlin, Springer International Publishing, Springer
Fecha de publicaci�n: 2018
Idioma: Ingl�s
ISBN 10: 3319910736
ISBN 13: 9783319910734
Encuadernaci�n: Taschenbuch
Estado: Neu
Dimensiones: 235�mil�metros de ancho por 155 de alto por 2 de largo
Peso: 122 gramos

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Sinopsis

This book presents a study on how thread and data mapping techniques can be used to improve the performance of multi-core architectures.

It describes how the memory hierarchy introduces non-uniform memory access, and how mapping can be used to reduce the memory access latency in current hardware architectures.

On the software side, this book describes the characteristics present in parallel applications that are used by mapping techniques to improve memory access.

Several state-of-the-art methods are analyzed, and the benefits and drawbacks of each one are identified.

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Eduardo Henrique Molina da Cruz graduated, with honors, in Computer Science in the State University of Maring� (UEM) in 2009. He received his master's degree from the Postgraduate Program in Computing in the Informatics Institute of the Federal University of Rio Grande do Sul (UFRGS) in 2012. In 2016, he received his Ph.D., with honors, also by the Postgraduate Program in Computing at the Informatics Institute of the Federal University of Rio Grande do Sul (UFRGS). After the Ph.D., he worked as a postdoctoral researcher at the Federal University of Rio Grande do Sul (UFRGS). His research comprises the areas of computer architecture, operating systems and parallel and distributed processing. It focuses on optimizing the memory access in multicore and manycore architectures, as well as architectures with non-uniform access to memory (NUMA). Currently, he is a professor at Federal Institute of Parana (IFPR).

Matthias Diener received his PhD degree in Computer Science fromthe Federal University of Rio Grande do Sul (UFRGS) and the TU Berlin in 2015. He is currently a postdoctoral researcher at the University of Illinois at Urbana-Champaign. His work focuses on adapting parallel applications to the hardware they are running on, through improving data locality, load balancing, and support for heterogeneous systems.

Philippe O. A. Navaux graduated in electronic engineering from UFRGS in 1970, and received the masters degree in applied physics from UFRGS in 1973 and the Ph.D. degree in computer science from INPG, France in 1979. He is a professor at UFRGS since 1973. He is the head of the Parallel and Distributed Processing Group at UFRGS and a consultant to various national and international funding agencies such as DoE (US), ANR (FR), CNPq, and CAPES (BR).

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