TFET Integrated Circuits

This book describes the physical operation of the Tunnel Field-effect Transistor (TFET) and circuits built with this device. Whereas the majority of publications on TFETs describe in detail the device, its characteristics, variants and performance, this will be the first book addressing TFET integrated circuits (TFET ICs). The authors describe the peculiarities of TFET ICs and their differences with MOSFETs. They also develop and analyze a number of logic circuits and memories. The discussion also includes complex circuits combining CMOS and TFET, as well as a potential fabrication process in Silicon.

Navneet Gupta obtained his Doctoral degree from University of Paris VI, where he was working in Institut Supérieur d'Électronique de Paris in collaboration with Commissariat `a l’Énergie Atomique et aux Énergies Alternatives. His research was mainly focused on CMOS, Tunnel FET (TFETs) and CMOS/TFET hybrid circuits for ultra-low leakage, low cost IoT applications and adaptive circuits for re-configurable computing. His contributions are diverse including TFET circuits, memory design, adaptive system architecture and metastability resilient circuits. He has more than 10 years industry research and development experience with companies such as STMicroelectronics, Broadcom and Minima Processor. His current research interests are low-power circuits and systems, advance voltage scaling techniques, adaptive systems, memory design and reconfigurable systems. He is an expert in practical realization of new research concepts for commercial use.

Adam Makosiej received the M.S. degree from the Technical University of Lodz, Lodz, Poland, in 2008 and the Ph.D. degree from the Telecom ParisTech, Paris, France in 2012. From 2013 to 2019 he was working as a memory design engineer in CEA-LETI, Grenoble, France. Since the end of 2019 is working as a product manager at Xenergic, Lund, Sweden. His research was mainly focused on the low-power and low-voltage memory design for IoT-like applications, the use of TFET in memory and logic design, 3D monolithic circuits and application of emerging non-volatile devices in memory circuits.

Prof. Amara AMARA obtained his HDR (Confirmation of Leading Research Capabilities) from Evry University, a Ph.D. in computer science in 1989 and a Master in 1984 in microelectronics and computer science from Paris VI University. His research interest is on low power memory and circuit design with emerging technologies. 

Amara is an active IEEE volunteer, he was President of the IEEE France Section and is currently President of IEEE CASS Society.

Amara published a book on Molecular Electronics and co-edited two books: “Double-Gate FD SOI devices and circuits” and “Emerging Technologies and Circuits”. He is co-author of numerous papers published in IEEE conferences and journals. He was advisor of more than 15 PhD students on subjects related to his research interests.

Andrei Vladimirescu (LF’17) received his MS and PhD degrees from the University of California, Berkeley, where he was a key contributor to the circuit simulator SPICE. He is the author of the leading text on the subject, The SPICE Book. He pioneered electrical simulation on parallel computers with the CLASSIE simulator as part of his PhD.

For many years Andrei was R&D director leading the design and implementation of innovative software and hardware Electronic Design Automation (EDA) products for Analog Devices Inc., Daisy Systems, Analog Design Tools, Valid Logic and Cadence. Currently, Andrei is professor at the University of California Berkeley and at the Institut Superieur d’Electronique de Paris (ISEP). His research activities are in the areas of design, simulation and modeling of CMOS circuits, new devices and circuits for quantum computing.

Andrei is an IEEE Life Fellow and a member of the IEEE Circuits and Systems Society Board of Governors.

Costin Anghel (M’08) received the B.S. and M.S. degrees from the Polytechnic Institute of Bucharest, Bucharest, Romania, in 1998, and 1999 and the Ph.D. degree from the Swiss Federal Institute of Technology (EPFL), Lausanne, Switzerland in 2004. He obtained his HDR (Habilitation à Diriger des Recherches) degree from Université Pierre et Marie CURIE (UPMC), Paris, France, in 2013.

From 2008 to 2017 he was a Professor with the Micro-Nano-Electronics Laboratory, Institut Supérieur d’Electronique de Paris (ISEP), Paris, France, leading the Micro-Nano Electronics team.

Dr. Anghel was also an expert for “Nanoelectronics” section of the Observatory for Micro and Nano Technologies (www.omnt.fr) and an Associate Editor for IEEE Transactions on Nanotechnology.