Structured Logic Design With Vhdl

While other books concentrate just on the VHDL hardware description language without really teaching the design process, this valuable reference shows you how to design with VHDL in a synthesis context. James R. Armstrong and F. Gail Gray teach the VHDL language in detail and provide numerous examples of VHDL models used in different aspects of the design process. In addition, the authors describe design at three different levels of abstraction (algorithmic, data flow, and gate level), illustrate the design of combinational and sequential logic at these three levels, and examine various forms of control unit design. Practicing engineers involved in digital design as well as anyone interested in the development of methods for computer-aided design will find Structured Logic Design with VHDL a welcome addition to their personal reference library.