Simulation of brain neurons in real-time using biophysically-meaningful models is a pre-requisite for comprehensive understanding of how neurons process information and communicate with each other, in effect efficiently complementing in-vivo experiments. In spiking neural networks (SNNs), propagated information is not just encoded by the firing rate of each neuron in the network, as in artificial neural networks (ANNs), but, in addition, by amplitude, spike-train patterns, and the transfer rate. The high level of realism of SNNs and more significant computational and analytic capabilities in comparison with ANNs, however, limit the size of the realized networks. Consequently, the main challenge in building complex and biophysically-accurate SNNs is largely posed by the high computational and data transfer demands.

Real-Time Multi-Chip Neural Network for Cognitive Systems presents novel real-time, reconfigurable, multi-chip SNN system architecture based on localized communication, which effectively reduces the communication cost to a linear growth. The system use double floating-point arithmetic for the most biologically accurate cell behavior simulation, and is flexible enough to offer an easy implementation of various neuron network topologies, cell communication schemes, as well as models and kinds of cells. The system offers a high run-time configurability, which reduces the need for resynthesizing the system. In addition, the simulator features configurable on- and off-chip communication latencies as well as neuron calculation latencies. All parts of the system are generated automatically based on the neuron interconnection scheme in use. The simulator allows exploration of different system configurations, e.g. the interconnection scheme between the neurons, the intracellular concentration of different chemical compounds (ions), which affect how action potentials are initiated and propagate.

Acerca de los autores

Amir Zjajo received the M.Sc. and DIC degrees from the Imperial College London, London, U.K., in 2000 and the PhD. degree from Eindhoven University of Technology, Eindhoven, The Netherlands in 2010, all in electrical engineering. In 2000, he joined Philips Research Laboratories as a member of the research staff in the Mixed-Signal Circuits and Systems Group. From 2006 until 2009, he was with Corporate Research of NXP Semiconductors as a Senior Research Scientist. In 2009, he joined Delft University of Technology, Delft, The Netherlands, as a Faculty Member with the Circuits and Systems Group. In 2018, he co-founded Innatera Nanosystems B.V. to commercialize bionic signal processing technology. Dr. Zjajo has published more than 80 papers in referenced journals and conference proceedings, and holds more than 10 US patents or patent pending. He is author of the books Brain-Machine Interface: Circuits and Systems (Springer, 2016), Low-Voltage High-Resolution A/D Converters: Design, Test and Calibration (Springer, 2011, Chinese translation, China Machine Press, 2015), and Stochastic Process Variations in Deep-Submicron CMOS: Circuits and Algorithms (Springer, 2013). He served as a member of Technical Program Committee of IEEE International Symposium on Quality Electronic Design, IEEE Design, Automation and Test in Europe Conference, IEEE International Symposium on Circuits and Systems, IEEE International Symposium on VLSI, IEEE International Symposium on Nanoelectronic and Information Systems, and IEEE International Conference on Embedded Computer Systems. His research interests include energy-efﬁcient digital/mixed-signal circuit and system design for biomedical and mobile applications, on-chip machine learning and inference, sensor fusion, and bionic electronic circuits for autonomous cognitive systems.

Rene van Leuken received the M.Sc. and Ph.D. degrees in electrical engineering from the Delft University of Technology, Delft, The Netherlands, in 1983 and 1988, respectively. He is currently a Professor with the Circuit and Systems Group, Faculty of Electrical Engineering, Mathematics and Computer Science, Delft University of Technology (TU Delft), The Netherlands. He has authored or co-authored papers in all major journals, conferences and workshops proceedings, and has received several best paper awards over the years. His research interests include high-level digital system design, system design optimization, VLSI design, and high performance compute (DSP) engines. His major research activity is neuromorphic computing. Dr. van Leuken has been involved in many major research and development projects: ESPRIT, FP6, FP7, JESSI, MEDEA, and recently in ENIAC/CATRENE, and ARTEMIS projects. He is member of the PATMOS steering committee and the DATE Technical Program Committee.

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