Rapid Prototyping of Digital Systems: A Tutorial Approach

Descripción:

Readable copy. Pages may have considerable notes/highlighting. ~ ThriftBooks: Read More, Spend Less. N° de ref. del artículo G0792374398I5N00

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Sinopsis:

Reseña del editor: Rapid Prototyping of Digital Systems, Second Edition provides an exciting and challenging laboratory component for an undergraduate digital logic design class. The more advanced topics and exercises are also appropriate for consideration at schools that have an upper level course in digital logic or programmable logic. Design engineers working in industry will also want to consider this book for a rapid introduction to FPLD technology and logic synthesis using commercial CAD tools, especially if they have not had previous experience with the new and rapidly evolving technology. Two tutorials on the Altera CAD tool environment, an overview of programmable logic, and a design library with several easy-to-use input and output functions were developed for this book to help the reader get started quickly. Early design examples use schematic capture and library components. VHDL is used for more complex designs after a short introduction to VHDL-based synthesis. The second edition of the text now includes Altera's 10.1 student edition software which adds support for Windows 2000 and designs that are three times larger using the new 70,000 gate UP 1X board. All designs in the book's CD-Rom have been updated to work with the original UP 1 board or the newer UP 1X board using the new Altera student version software. A coupon is included with the text for purchase of the new UP 1X board. The additional logic and memory in the UP 1X's FLEX 10K70 is useful on larger design projects such as computers and video games. In addition to the new software, the second edition includes an update chapter on programmable logic, new robot sensors and projects, optional Verilog examples, and a meta assembler which can be used to develop assemble language programs for the computer designs in Chapters 8 and 13.