This textbook introduces readers to the theoretical aspects of machine learning (ML) algorithms, starting from simple neuron basics, through complex neural networks, including generative adversarial neural networks and graph convolution networks.
Sai Manoj P D is an assistant professor at George Mason University. Prior joining to George Mason University, he was a post-doctoral research scientist at the System-on-Chip group, Institute of Computer Technology, Vienna University of Technology (TU Wien), Austria. He received his Ph.D. in Electrical and Electronics Engineering from Nanyang Technological University, Singapore in 2015. He received his master’s in Information Technology from International Institute of Information Technology Bangalore (IIITB), Bangalore, India in 2012. His research interests include on-chip hardware security, neuromorphic computing, adversarial machine learning, self-aware SoC design, image processing and time-series analysis, emerging memory devices and heterogeneous integration techniques. One of his works is nominated for Best Paper Award in Design Automation & Test in Europe (DATE) 2018 and won Xilinx open hardware contest in 2017 (student category). He is the recipient of the “A. Richard Newton Young Research Fellow” award in Design Automation Conference, 2013.
Setareh Rafatirad is an Associate Professor in Department of Information Sciences and Technology at George Mason University. She obtained her M.Sc. and PhD in Computer Science from University of California, Irvine in 2009 and 2012. Her research interest covers several areas including Big Data Analytics, Data Mining, Knowledge Discovery and Knowledge Representation, Image Understanding, Multimedia Information Retrieval, and Applied Machine Learning. Currently, she is actively supervising multiple research projects focused on applying ML and Deep Learning techniques on different domains including House Price Prediction, Malware Detection, and Emerging big data application benchmarking and characterization on heterogeneous architectures.
Houman Homayoun is anAssistant Professor in the Department of Electrical and Computer Engineering at George Mason University. He also holds a courtesy appointment with the Department of Computer Science as well as Information Science and Technology Department. Houman joined GMU as a tenure-track Assistant Professor in August 2012. Prior to joining GMU, Houman spent two years at the University of California, San Diego, as NSF Computing Innovation (CI) Fellow awarded by the CRA-CCC working with Professor Dean Tullsen. Houman graduated in 2010 from University of California, Irvine with a Ph.D. in Computer Science. He was a recipient of the four-year University of California, Irvine Computer Science Department chair fellowship. His dissertation, entitled “Beyond Memory Cells for Leakage and Temperature Control in SRAM-based Units, the Peripheral Circuits Story”, was supervised by Professor Alex Veidenbaum from CS Department, and Professor Jean-Luc Gaudiot, and Professor Fadi Kurdahi from ECE Department. Out ofthirty-one doctoral dissertations his work was nominated for 2010 ACM Doctoral Dissertation Award. Houman received the MS degree in computer engineering in 2005 from University of Victoria and BS degree in electrical engineering in 2003 from Sharif University of Technology. Houman conduct research in big data computing, heterogeneous computing and hardware security and trust, which spans the areas of computer design and embedded systems, where he has published more than 80 technical papers in the prestigious conferences and journals on the subject. He is currently leading six research projects funded by DARPA, AFRL and NSF on the topics of hardware security and trust, big data computing, heterogeneous architectures, and biomedical computing. Houman received the 2016 GLSVLSI conference best paper award for developing a manycore accelerator for wearable biomedical computing. Houman is currently serving as Member of Advisory Committee, Cybersecurity Research and Technology Commercialization (R&TC) working group in the Commonwealth of Virginia. Since 2017 he has been serving as an Associate Editor of IEEE Transactions on VLSI. He served as TPC Co-Chair for GLSVLSI 2018. He is currently the general chair of GLSVLSI 2019.
