Low-Power High-Level Synthesis for Nanoscale CMOS Circuits
Idioma: inglés
Editorial: Springer US, 2010
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Low-Power High-Level Synthesis for Nanoscale CMOS Circuits | Saraju P. Mohanty (u. a.) | Taschenbuch | xxxii | Englisch | 2010 | Springer US | EAN 9781441945549 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu.
N° de ref. del artículo 107152135
- Título
- Low-Power High-Level Synthesis for Nanoscale CMOS Circuits
- Autor
- Saraju P. Mohanty (u. a.)
- Editorial
- Springer US
- Año de publicación
- 2010
- Estado
- Neu
- Encuadernación
- Taschenbuch
- Idioma
- inglés
- ISBN 10
- 1441945547
- ISBN 13
- 9781441945549
- Peso del artículo
- 511 gramos
- Dimensiones
- 235 x 155 x 19 mm
- Catálogos de vendedores
- Bücher
Low-Power High-Level Synthesis for Nanoscale CMOS Circuits addresses the need for analysis, characterization, estimation, and optimization of the various forms of power dissipation in the presence of process variations of nano-CMOS technologies. The authors show very large-scale integration (VLSI) researchers and engineers how to minimize the different types of power consumption of digital circuits. The material deals primarily with high-level (architectural or behavioral) energy dissipation because the behavioral level is not as highly abstracted as the system level nor is it as complex as the gate/transistor level. At the behavioral level there is a balanced degree of freedom to explore power reduction mechanisms, the power reduction opportunities are greater, and it can cost-effectively help in investigating lower power design alternatives prior to actual circuit layout or silicon implementation.
The book is a self-contained low-power, high-level synthesis text for Nanoscale VLSI design engineers and researchers. Each chapter has simple relevant examples for a better grasp of the principles presented. Several algorithms are given to provide a better understanding of the underlying concepts. The initial chapters deal with the basics of high-level synthesis, power dissipation mechanisms, and power estimation. In subsequent parts of the text, a detailed discussion of methodologies for the reduction of different types of power is presented including:
• Power Reduction Fundamentals
• Energy or Average Power Reduction
• Peak Power Reduction
• Transient Power Reduction
• Leakage Power Reduction
Low-Power High-Level Synthesis for Nanoscale CMOS Circuits provides a valuable resource for the design of low-power CMOS circuits.
“Sinopsis” puede pertenecer a otra edición de este título.
De la contraportada
Low-Power High-Level Synthesis for Nanoscale CMOS Circuits addresses the need for analysis, characterization, estimation, and optimization of the various forms of power dissipation in the presence of process variations of nano-CMOS technologies. The authors show very large-scale integration (VLSI) researchers and engineers how to minimize the different types of power consumption of digital circuits. The material deals primarily with high-level (architectural or behavioral) energy dissipation because the behavioral level is not as highly abstracted as the system level nor is it as complex as the gate/transistor level. At the behavioral level there is a balanced degree of freedom to explore power reduction mechanisms, the power reduction opportunities are greater, and it can cost-effectively help in investigating lower power design alternatives prior to actual circuit layout or silicon implementation.
The book is a self-contained low-power, high-level synthesis text for Nanoscale VLSI design engineers and researchers. Each chapter has simple relevant examples for a better grasp of the principles presented. Several algorithms are given to provide a better understanding of the underlying concepts. The initial chapters deal with the basics of high-level synthesis, power dissipation mechanisms, and power estimation. In subsequent parts of the text, a detailed discussion of methodologies for the reduction of different types of power is presented including:
Power Reduction Fundamentals
Energy or Average Power Reduction
Peak Power Reduction
Transient Power Reduction
Leakage Power Reduction
Low-Power High-Level Synthesis for Nanoscale CMOS Circuits provides a valuable resource for the design of low-power CMOS circuits.
“Acerca de” puede pertenecer a otra edición de este título.
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