This book provides comprehensive coverage of verification and debugging techniques for embedded software, which is frequently used in safety critical applications (e.g., automotive), where failures are unacceptable. Since the verification of complex systems needs to encompass the verification of both hardware and embedded software modules, this book focuses on verification and debugging approaches for embedded software with hardware dependencies. Coverage includes the entire flow of design, verification and debugging of embedded software and all key approaches to debugging, dynamic, static, and hybrid verification. This book discusses the current, industrial embedded software verification flow, as well as emerging trends with focus on formal and hybrid verification and debugging approaches.

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Markus Winterholer has been involved in system design and HW/SW development for more than 20 years. Most recently he has been focused on developing and testing software for the financial sector and e-government solutions in Switzerland. Before, he was responsible for the development of several generations of embedded software debug and verification solutions at Cadence for more than ten years. Furthermore, he also deployed advanced verification methodologies including application of constrained random techniques. Before he joined Cadence, he worked five years as a freelancer offering consulting services for hardware and software development and verification focusing on leading edge communication standards and processors. Markus Winterholer holds a diploma degree in computer science from the University of T�bingen.

Djones Lettnin has a Master's in Electric Engineering at the Catholic University of Rio Grande do Sul (2004), Brazil, and a PhD. in Computer Engineering at the Eberhard Karls University of T�bingen (2009), Germany. Since August 2011, he has been a Professor at Federal University of Santa Catarina, Brazil. He works in many cooperation projects with Cadence Design Systems, Freescale, Bosch, and Intel. He is also the coordinator of the Cadence Academic Network in Latin America. His main interests are in design and functional verification of hardware and embedded software with a main focus on: EDA, modeling of embedded systems, digital design, verification based on assertions, and semiformal and formal verification using model checking.

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