EMBEDDED SOFTWARE VERIFICATION AND DEBUGGING (HB 2017)

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Brand New! Fast Delivery US Edition and ship within 24-48 hours. Deliver by FedEx and Dhl, & Aramex, UPS, & USPS and we do accept APO and PO BOX Addresses. Order can be delivered worldwide within 7-10 days and we do have flat rate for up to 2LB. Extra shipping charges will be requested if the Book weight is more than 5 LB. This Item May be shipped from India, United states & United Kingdom. Depending on your location and availability. N° de ref. del artículo CvS 9781461422655

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Markus Winterholer has been involved in system design and HW/SW development for more than 20 years. Most recently he has been focused on developing and testing software for the financial sector and e-government solutions in Switzerland. Before, he was responsible for the development of several generations of embedded software debug and verification solutions at Cadence for more than ten years. Furthermore, he also deployed advanced verification methodologies including application of constrained random techniques. Before he joined Cadence, he worked five years as a freelancer offering consulting services for hardware and software development and verification focusing on leading edge communication standards and processors. Markus Winterholer holds a diploma degree in computer science from the University of Tübingen.

Djones Lettnin has a Master's in Electric Engineering at the Catholic University of Rio Grande do Sul (2004), Brazil, and a PhD. in Computer Engineering at the Eberhard Karls University of Tübingen (2009), Germany. Since August 2011, he has been a Professor at Federal University of Santa Catarina, Brazil. He works in many cooperation projects with Cadence Design Systems, Freescale, Bosch, and Intel. He is also the coordinator of the Cadence Academic Network in Latin America. His main interests are in design and functional verification of hardware and embedded software with a main focus on: EDA, modeling of embedded systems, digital design, verification based on assertions, and semiformal and formal verification using model checking.