Design Space Exploration of Network-on-Chip at System level | A Genetic Algorithm Approach. Este artículo no está disponible.
Idioma: inglés
Editorial: LAP LAMBERT Academic Publishing, 2012
- Tapa blanda
- Nuevo

Librería: preigu, Osnabrück, Alemaniapreigu
Vendedor de 5 estrellas
Vendedor de AbeBooks desde 5 de agosto de 2024
No disponible
Tapa blanda
Condición: Nuevo
EUR 51,10
Descripción del artículo del vendedor
Design Space Exploration of Network-on-Chip at System level | A Genetic Algorithm Approach | Rabindra Kumar Jena | Taschenbuch | 160 S. | Englisch | 2012 | LAP LAMBERT Academic Publishing | EAN 9783847320050 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu.
N° de ref. del artículo 106660134
- Título
- Design Space Exploration of Network-on-Chip at System level | A Genetic Algorithm Approach
- Autor
- Rabindra Kumar Jena
- Editorial
- LAP LAMBERT Academic Publishing
- Año de publicación
- 2012
- Estado
- Neu
- Encuadernación
- Taschenbuch
- Idioma
- inglés
- ISBN 10
- 384732005X
- ISBN 13
- 9783847320050
- Peso del artículo
- 256 gramos
- Dimensiones
- 220 x 150 x 11 mm
- Catálogos de vendedores
- Bücher
About the Book: The goal of this text is to help students, researchers and academicians, who are working in the field of CAD for VLSI. Network-on-Chip(NoC) has been recently developed as an on-chip communication solution for System-on-Chip(SoC) design. This paradigm supports various communication resources at a time and overcomes the limitations of bus-based System. Design space exploration methodology at system level reduces the time-to-market pressure of the large and complex systems. On the other hand, design space exploration at system level is a combinatorial optimization problem. So, multi-objective Genetic Algorithm has been considered as an optimization tool for the design space exploration task. This book provides detailed methodology/algorithms to explore the design space of NoC at System Level using Genetic Algorithm. This book is the outcome of my PhD work. I hope this book will help all stake holders for extensive research in the field of NoC at System level.
“Sinopsis” puede pertenecer a otra edición de este título.
Reseña del editor
About the Book: The goal of this text is to help students, researchers and academicians, who are working in the field of CAD for VLSI. Network-on-Chip(NoC) has been recently developed as an on-chip communication solution for System-on-Chip(SoC) design. This paradigm supports various communication resources at a time and overcomes the limitations of bus-based System. Design space exploration methodology at system level reduces the time-to-market pressure of the large and complex systems. On the other hand, design space exploration at system level is a combinatorial optimization problem. So, multi-objective Genetic Algorithm has been considered as an optimization tool for the design space exploration task. This book provides detailed methodology/algorithms to explore the design space of NoC at System Level using Genetic Algorithm. This book is the outcome of my PhD work. I hope this book will help all stake holders for extensive research in the field of NoC at System level.
“Acerca de” puede pertenecer a otra edición de este título.