Computer Architecture Techniques for Power-efficiency

Kaxiras, Stefanos; Martonosi, Margaret

ISBN 10: 3031005937 ISBN 13: 9783031005930
Editorial: Springer, 2008
Nuevos Encuadernación de tapa blanda

Librería: GreatBookPricesUK, Woodford Green, Reino Unido Calificación del vendedor: 5 de 5 estrellas Valoración 5 estrellas, Más información sobre las valoraciones de los vendedores

Vendedor de AbeBooks desde 28 de enero de 2020

Este artículo en concreto ya no está disponible.

Descripción

Descripción:

N° de ref. del artículo 44569583-n

Denunciar este artículo

Sinopsis:

In the last few years, power dissipation has become an important design constraint, on par with performance, in the design of new computer systems. Whereas in the past, the primary job of the computer architect was to translate improvements in operating frequency and transistor count into performance, now power efficiency must be taken into account at every step of the design process. While for some time, architects have been successful in delivering 40% to 50% annual improvement in processor performance, costs that were previously brushed aside eventually caught up. The most critical of these costs is the inexorable increase in power dissipation and power density in processors. Power dissipation issues have catalyzed new topic areas in computer architecture, resulting in a substantial body of work on more power-efficient architectures. Power dissipation coupled with diminishing performance gains, was also the main cause for the switch from single-core to multi-core architectures and aslowdown in frequency increase. This book aims to document some of the most important architectural techniques that were invented, proposed, and applied to reduce both dynamic power and static power dissipation in processors and memory hierarchies. A significant number of techniques have been proposed for a wide range of situations and this book synthesizes those techniques by focusing on their common characteristics. Table of Contents: Introduction / Modeling, Simulation, and Measurement / Using Voltage and Frequency Adjustments to Manage Dynamic Power / Optimizing Capacitance and Switching Activity to Reduce Dynamic Power / Managing Static (Leakage) Power / Conclusions

Acerca del autor: Stefanos Kaxiras is a full professor at Uppsala University, Sweden. He holds a Ph.D. degree in Computer Science from the University of Wisconsin. In 1998, he joined the Computing Sciences Center at Bell Labs (Lucent) and later Agere Systems. In 2003 he joined the faculty of the ECE Department of the University of Patras, Greece and in 2010 became a full professor at Uppsala University, Sweden. Kaxiras' research interests are in the areas of memory systems, and multiprocessor/multicore systems, with a focus on power efficiency. He has co-authored more than 100 research papers and 13 US patents, participated in five major European research projects, and currently receives funding from Sweden’s business incubator and innovation agency VINNOVA. Kaxiras is a Distinguished ACM Scientist and IEEE member. Margaret Martonosi is the Hugh Trumbull Adams '35 Professor of Computer Science at Princeton University, where she has been on the faculty since 1994. She also holds an affiliated faculty appointment in Princeton EE. Martonosi's research interests are in computer architecture and mobile computing, with particular focus on power-efficient systems. Her work has included the development of the Wattch power modeling tool and the Princeton ZebraNet mobile sensor network project for the design and real-world deployment of zebra tracking collars in Kenya. Her current research focuses on hardware-software interface approaches to manage heterogeneous parallelism and power-performance tradeoffs in systems ranging from smartphones to chip multiprocessors to large-scale data centers. Martonosi is a Fellow of both IEEE and ACM. She was the 2013 recipient of the Anita Borg Institute Technical Leadership Award. She has also received the 2013 NCWIT Undergraduate Research Mentoring Award and the 2010 Princeton University Graduate Mentoring Award. In addition to many archival publications, Martonosi is an inventor on six granted US patents, and has co-authored a technical reference book on power-aware computer architecture. She serves on the Board of Directors of the Computing Research Association (CRA). Martonosi completed her Ph.D. at Stanford University, and also holds a Master's degree from Stanford and a bachelor's degree from Cornell University, all in Electrical Engineering.

"Sobre este título" puede pertenecer a otra edición de este libro.

Detalles bibliográficos

Título: Computer Architecture Techniques for ...
Editorial: Springer
Año de publicación: 2008
Encuadernación: Encuadernación de tapa blanda
Condición: New

Los mejores resultados en AbeBooks

Imagen del vendedor

Kaxiras, Stefanos|Martonosi, Margaret
ISBN 10: 3031005937 ISBN 13: 9783031005930
Nuevo Tapa blanda
Impresión bajo demanda

Librería: moluna, Greven, Alemania

Calificación del vendedor: 4 de 5 estrellas Valoración 4 estrellas, Más información sobre las valoraciones de los vendedores

Condición: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. In the last few years, power dissipation has become an important design constraint, on par with performance, in the design of new computer systems. Whereas in the past, the primary job of the computer architect was to translate improvements in operating fre. Nº de ref. del artículo: 608129012

Contactar al vendedor

Comprar nuevo

EUR 34,41
EUR 48,99 shipping
Se envía de Alemania a Estados Unidos de America

Cantidad disponible: Más de 20 disponibles

Añadir al carrito

Imagen del vendedor

Margaret Martonosi (u. a.)
Publicado por Springer International Publishing, 2008
ISBN 10: 3031005937 ISBN 13: 9783031005930
Nuevo Taschenbuch

Librería: preigu, Osnabrück, Alemania

Calificación del vendedor: 5 de 5 estrellas Valoración 5 estrellas, Más información sobre las valoraciones de los vendedores

Taschenbuch. Condición: Neu. Computer Architecture Techniques for Power-Efficiency | Margaret Martonosi (u. a.) | Taschenbuch | xi | Englisch | 2008 | Springer International Publishing | EAN 9783031005930 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu. Nº de ref. del artículo: 121975078

Contactar al vendedor

Comprar nuevo

EUR 35,85
EUR 70,00 shipping
Se envía de Alemania a Estados Unidos de America

Cantidad disponible: 5 disponibles

Añadir al carrito

Imagen de archivo

Kaxiras, Stefanos; Martonosi, Margaret
Publicado por Springer, 2008
ISBN 10: 3031005937 ISBN 13: 9783031005930
Nuevo Tapa blanda

Librería: Lucky's Textbooks, Dallas, TX, Estados Unidos de America

Calificación del vendedor: 5 de 5 estrellas Valoración 5 estrellas, Más información sobre las valoraciones de los vendedores

Condición: New. Nº de ref. del artículo: ABLIING23Mar3113020034876

Contactar al vendedor

Comprar nuevo

EUR 36,79
EUR 3,40 shipping
Se envía dentro de Estados Unidos de America

Cantidad disponible: Más de 20 disponibles

Añadir al carrito

Imagen del vendedor

Margaret Martonosi
Publicado por Springer International Publishing, 2008
ISBN 10: 3031005937 ISBN 13: 9783031005930
Nuevo Taschenbuch

Librería: AHA-BUCH GmbH, Einbeck, Alemania

Calificación del vendedor: 5 de 5 estrellas Valoración 5 estrellas, Más información sobre las valoraciones de los vendedores

Taschenbuch. Condición: Neu. Druck auf Anfrage Neuware - Printed after ordering - In the last few years, power dissipation has become an important design constraint, on par with performance, in the design of new computer systems. Whereas in the past, the primary job of the computer architect was to translate improvements in operating frequency and transistor count into performance, now power efficiency must be taken into account at every step of the design process. While for some time, architects have been successful in delivering 40% to 50% annual improvement in processor performance, costs that were previously brushed aside eventually caught up. The most critical of these costs is the inexorable increase in power dissipation and power density in processors. Power dissipation issues have catalyzed new topic areas in computer architecture, resulting in a substantial body of work on more power-efficient architectures. Power dissipation coupled with diminishing performance gains, was also the main cause for the switch from single-core to multi-core architectures and aslowdown in frequency increase. This book aims to document some of the most important architectural techniques that were invented, proposed, and applied to reduce both dynamic power and static power dissipation in processors and memory hierarchies. A significant number of techniques have been proposed for a wide range of situations and this book synthesizes those techniques by focusing on their common characteristics. Table of Contents: Introduction / Modeling, Simulation, and Measurement / Using Voltage and Frequency Adjustments to Manage Dynamic Power / Optimizing Capacitance and Switching Activity to Reduce Dynamic Power / Managing Static (Leakage) Power / Conclusions. Nº de ref. del artículo: 9783031005930

Contactar al vendedor

Comprar nuevo

EUR 37,44
EUR 62,10 shipping
Se envía de Alemania a Estados Unidos de America

Cantidad disponible: 1 disponibles

Añadir al carrito

Imagen del vendedor

Margaret Martonosi
ISBN 10: 3031005937 ISBN 13: 9783031005930
Nuevo Taschenbuch

Librería: buchversandmimpf2000, Emtmannsberg, BAYE, Alemania

Calificación del vendedor: 5 de 5 estrellas Valoración 5 estrellas, Más información sobre las valoraciones de los vendedores

Taschenbuch. Condición: Neu. Neuware -In the last few years, power dissipation has become an important design constraint, on par with performance, in the design of new computer systems. Whereas in the past, the primary job of the computer architect was to translate improvements in operating frequency and transistor count into performance, now power efficiency must be taken into account at every step of the design process. While for some time, architects have been successful in delivering 40% to 50% annual improvement in processor performance, costs that were previously brushed aside eventually caught up. The most critical of these costs is the inexorable increase in power dissipation and power density in processors. Power dissipation issues have catalyzed new topic areas in computer architecture, resulting in a substantial body of work on more power-efficient architectures. Power dissipation coupled with diminishing performance gains, was also the main cause for the switch from single-core to multi-core architectures and aslowdown in frequency increase. This book aims to document some of the most important architectural techniques that were invented, proposed, and applied to reduce both dynamic power and static power dissipation in processors and memory hierarchies. A significant number of techniques have been proposed for a wide range of situations and this book synthesizes those techniques by focusing on their common characteristics. Table of Contents: Introduction / Modeling, Simulation, and Measurement / Using Voltage and Frequency Adjustments to Manage Dynamic Power / Optimizing Capacitance and Switching Activity to Reduce Dynamic Power / Managing Static (Leakage) Power / ConclusionsSpringer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 220 pp. Englisch. Nº de ref. del artículo: 9783031005930

Contactar al vendedor

Comprar nuevo

EUR 37,44
EUR 60,00 shipping
Se envía de Alemania a Estados Unidos de America

Cantidad disponible: 2 disponibles

Añadir al carrito

Imagen del vendedor

Margaret Martonosi
ISBN 10: 3031005937 ISBN 13: 9783031005930
Nuevo Taschenbuch
Impresión bajo demanda

Librería: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Alemania

Calificación del vendedor: 5 de 5 estrellas Valoración 5 estrellas, Más información sobre las valoraciones de los vendedores

Taschenbuch. Condición: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -In the last few years, power dissipation has become an important design constraint, on par with performance, in the design of new computer systems. Whereas in the past, the primary job of the computer architect was to translate improvements in operating frequency and transistor count into performance, now power efficiency must be taken into account at every step of the design process. While for some time, architects have been successful in delivering 40% to 50% annual improvement in processor performance, costs that were previously brushed aside eventually caught up. The most critical of these costs is the inexorable increase in power dissipation and power density in processors. Power dissipation issues have catalyzed new topic areas in computer architecture, resulting in a substantial body of work on more power-efficient architectures. Power dissipation coupled with diminishing performance gains, was also the main cause for the switch from single-core to multi-core architectures and a slowdown in frequency increase. This book aims to document some of the most important architectural techniques that were invented, proposed, and applied to reduce both dynamic power and static power dissipation in processors and memory hierarchies. A significant number of techniques have been proposed for a wide range of situations and this book synthesizes those techniques by focusing on their common characteristics. Table of Contents: Introduction / Modeling, Simulation, and Measurement / Using Voltage and Frequency Adjustments to Manage Dynamic Power / Optimizing Capacitance and Switching Activity to Reduce Dynamic Power / Managing Static (Leakage) Power / Conclusions 220 pp. Englisch. Nº de ref. del artículo: 9783031005930

Contactar al vendedor

Comprar nuevo

EUR 37,44
EUR 23,00 shipping
Se envía de Alemania a Estados Unidos de America

Cantidad disponible: 2 disponibles

Añadir al carrito

Imagen de archivo

Kaxiras, Stefanos
Publicado por Springer 2008-06, 2008
ISBN 10: 3031005937 ISBN 13: 9783031005930
Nuevo PF

Librería: Chiron Media, Wallingford, Reino Unido

Calificación del vendedor: 4 de 5 estrellas Valoración 4 estrellas, Más información sobre las valoraciones de los vendedores

PF. Condición: New. Nº de ref. del artículo: 6666-IUK-9783031005930

Contactar al vendedor

Comprar nuevo

EUR 37,62
EUR 17,63 shipping
Se envía de Reino Unido a Estados Unidos de America

Cantidad disponible: 10 disponibles

Añadir al carrito

Imagen de archivo

Kaxiras, Stefanos; Martonosi, Margaret
Publicado por Springer, 2008
ISBN 10: 3031005937 ISBN 13: 9783031005930
Nuevo Tapa blanda

Librería: California Books, Miami, FL, Estados Unidos de America

Calificación del vendedor: 5 de 5 estrellas Valoración 5 estrellas, Más información sobre las valoraciones de los vendedores

Condición: New. Nº de ref. del artículo: I-9783031005930

Contactar al vendedor

Comprar nuevo

EUR 42,09
Gastos de envío gratis
Se envía dentro de Estados Unidos de America

Cantidad disponible: Más de 20 disponibles

Añadir al carrito

Imagen de archivo

Kaxiras, Stefanos; Martonosi, Margaret
Publicado por Springer, 2008
ISBN 10: 3031005937 ISBN 13: 9783031005930
Nuevo Tapa blanda

Librería: Books Puddle, New York, NY, Estados Unidos de America

Calificación del vendedor: 4 de 5 estrellas Valoración 4 estrellas, Más información sobre las valoraciones de los vendedores

Condición: New. 1st edition NO-PA16APR2015-KAP. Nº de ref. del artículo: 26395061392

Contactar al vendedor

Comprar nuevo

EUR 51,57
EUR 3,40 shipping
Se envía dentro de Estados Unidos de America

Cantidad disponible: 4 disponibles

Añadir al carrito

Imagen de archivo

Kaxiras, Stefanos; Martonosi, Margaret
Publicado por Springer, 2008
ISBN 10: 3031005937 ISBN 13: 9783031005930
Nuevo Tapa blanda
Impresión bajo demanda

Librería: Majestic Books, Hounslow, Reino Unido

Calificación del vendedor: 4 de 5 estrellas Valoración 4 estrellas, Más información sobre las valoraciones de los vendedores

Condición: New. Print on Demand. Nº de ref. del artículo: 402364239

Contactar al vendedor

Comprar nuevo

EUR 51,68
EUR 7,40 shipping
Se envía de Reino Unido a Estados Unidos de America

Cantidad disponible: 4 disponibles

Añadir al carrito

Existen otras 1 copia(s) de este libro

Ver todos los resultados de su búsqueda