Adiabatic Logic

Idioma: inglés

Editorial: Springer, Springer Nov 2013, 2013

9400737270 / 9789400737273

Serie: Libro 20 de 72 - Springer Series in Advanced Microelectronics

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This item is printed on demand - Print on Demand Titel. Neuware -Adiabatic logic is a potential successor for static CMOS circuit design when it comes to ultra-low-power energy consumption. Future development like the evolutionary shrinking of the minimum feature size as well as revolutionary novel transistor concepts will change the gate level savings gained by adiabatic logic. In addition, the impact of worsening degradation effects has to be considered in the design of adiabatic circuits. The impact of the technology trends on the figures of merit of adiabatic logic, energy saving potential and optimum operating frequency, are investigated, as well as degradation related issues. Adiabatic logic benefits from future devices, is not susceptible to Hot Carrier Injection, and shows less impact of Bias Temperature Instability than static CMOS circuits. Major interest also lies on the efficient generation of the applied power-clock signal. This oscillating power supply can be used to save energy in short idle times by disconnecting circuits. An efficient way to generate the power-clock is by means of the synchronous 2N2P LC oscillator, which is also robust with respect to pattern-induced capacitive variations. An easy to implement but powerful power-clock gating supplement is proposed by gating the synchronization signals. Diverse implementations to shut down the system are presented and rated for their applicability and other aspects like energy reduction capability and data retention. Advantageous usage of adiabatic logic requires compact and efficient arithmetic structures. A broad variety of adder structures and a Coordinate Rotation Digital Computer are compared and rated according to energy consumption and area usage, and the resulting energy saving potential against static CMOS proves the ultra-low-power capability of adiabatic logic. In the end, a new circuit topology has to compete with static CMOS also in productivity. On a 130nm test chip, a large scale test vehicle containing an FIR filter was implemented in adiabatic logic, utilizing a standard, library-based design flow, fabricated, measured and compared to simulations of a static CMOS counterpart, with measured saving factors compliant to the values gained by simulation. This leads to the conclusion that adiabatic logic is ready for productive design due to compatibility not only to CMOS technology, but also to electronic design automation (EDA) tools developed for static CMOS system design.Springer-Verlag KG, Sachsenplatz 4-6, 1201 Wien 184 pp. Englisch.…

N° de ref. del artículo 9789400737273

Título
Adiabatic Logic
Autor
Philip Teichmann
Editorial
Springer, Springer Nov 2013
Año de publicación
2013
Estado
Neu
Encuadernación
Taschenbuch
Idioma
inglés
ISBN 10
9400737270
ISBN 13
9789400737273
Peso del artículo
289 gramos
Dimensiones
235x155x11 mm
Serie
Libro 20 de 72: Springer Series in Advanced Microelectronics

buchversandmimpf2000

Emtmannsberg, BAYE, Alemania

Vendedor de 5 estrellas

Vendedor de IberLibro desde 23 de enero de 2017

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