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Detalles bibliogr�ficos

T�tulo: ASIC and FPGA Verification: A Guide to Component Modeling (Systems on Silicon)
Editor: Morgan Kaufmann
Fecha de publicaci�n: 2004
Idioma: Ingl�s
ISBN 10: 0125105819
ISBN 13: 9780125105811
Encuadernaci�n: Encuadernaci�n de tapa dura
Estado: very_good

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Sinopsis

Richard Munden demonstrates how to create and use simulation models for verifying ASIC and FPGA designs and board-level designs that use off-the-shelf digital components. Based on the VHDL/VITAL standard, these models include timing constraints and propagation delays that are required for accurate verification of today s digital designs. ASIC and FPGA Verification: A Guide to Component Modeling expertly illustrates how ASICs and FPGAs can be verified in the larger context of a board or a system. It is a valuable resource for any designer who simulates multi-chip digital designs.

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By Richard Munden

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