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Design and Verification of ALU Using Verilog and Python Cocotb - Tapa blanda

Patel, Arpita

 
9786209201288: Design and Verification of ALU Using Verilog and Python Cocotb
Tapa blanda
ISBN 10: 6209201288 ISBN 13: 9786209201288
Editorial: LAP LAMBERT Academic Publishing, 2025

Sinopsis

This book presents a comprehensive study on the design and functional verification of an Arithmetic Logic Unit (ALU) using a hybrid approach that combines Verilog HDL for hardware modeling and Python Cocotb for testbench automation. It demonstrates how open-source tools such as Icarus Verilog, GTKWave, and Cocotb can be effectively integrated to create a professional-grade verification environment.The work provides step-by-step insights into RTL design, simulation workflows, Makefile automation, and waveform analysis, making it valuable for students, researchers, and professionals in VLSI and digital system design. By merging traditional HDL design with modern Python-based verification, this book highlights an innovative path toward efficient, flexible, and scalable digital hardware verification.

"Sinopsis" puede pertenecer a otra edición de este libro.

Editorial
LAP LAMBERT Academic Publishing
Año de publicación
2025
Idioma
Inglés
ISBN 10 
6209201288
ISBN 13 
9786209201288
Encuadernación
Tapa blanda
Número de páginas
52
Contacto del fabricante
no disponible
Persona responsable
no disponible