The paper describes a new architecture for implementation of 8 X 8 FDCT (Fast Discrete Cosine Transform) using Distributed Arithmetic (DA). This proposed architecture combines both DA based approaches for distributed input vector and constant coefficients. The described Combined Distributed Arithmetic based DCT (CDA-DCT) architecture has been implemented on Virtex II FPGA, and shows fewer adders and saving exceeding 97% achieved.
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The paper describes a new architecture for implementation of 8 X 8 FDCT (Fast Discrete Cosine Transform) using Distributed Arithmetic (DA). This proposed architecture combines both DA based approaches for distributed input vector and constant coefficients. The described Combined Distributed Arithmetic based DCT (CDA-DCT) architecture has been implemented on Virtex II FPGA, and shows fewer adders and saving exceeding 97% achieved.
Swapan Kumar Samaddar is a Senior Associate in Genpact India, Kolkata. He did BTech (CSE) from Netaji Subhash Engineering College, Kolkata and later on did his ME (CSE) from West Bengal University of Technology, Kolkata. His research areas are Digital Signal Processing, Image Processing, Advanced computer architecture and parallel architecture.
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Taschenbuch. Condición: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -The paper describes a new architecture for implementation of 8 X 8 FDCT (Fast Discrete Cosine Transform) using Distributed Arithmetic (DA). This proposed architecture combines both DA based approaches for distributed input vector and constant coefficients. The described Combined Distributed Arithmetic based DCT (CDA-DCT) architecture has been implemented on Virtex II FPGA, and shows fewer adders and saving exceeding 97% achieved. 136 pp. Englisch. Nº de ref. del artículo: 9783659377815
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Condición: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Samaddar Swapan KumarSwapan Kumar Samaddar is a Senior Associate in Genpact India, Kolkata. He did BTech (CSE) from Netaji Subhash Engineering College, Kolkata and later on did his ME (CSE) from West Bengal University of Technology, . Nº de ref. del artículo: 5152230
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Taschenbuch. Condición: Neu. This item is printed on demand - Print on Demand Titel. Neuware -The paper describes a new architecture for implementation of 8 X 8 FDCT (Fast Discrete Cosine Transform) using Distributed Arithmetic (DA). This proposed architecture combines both DA based approaches for distributed input vector and constant coefficients. The described Combined Distributed Arithmetic based DCT (CDA-DCT) architecture has been implemented on Virtex II FPGA, and shows fewer adders and saving exceeding 97% achieved.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 136 pp. Englisch. Nº de ref. del artículo: 9783659377815
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Taschenbuch. Condición: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - The paper describes a new architecture for implementation of 8 X 8 FDCT (Fast Discrete Cosine Transform) using Distributed Arithmetic (DA). This proposed architecture combines both DA based approaches for distributed input vector and constant coefficients. The described Combined Distributed Arithmetic based DCT (CDA-DCT) architecture has been implemented on Virtex II FPGA, and shows fewer adders and saving exceeding 97% achieved. Nº de ref. del artículo: 9783659377815
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Taschenbuch. Condición: Neu. Implementation of FDCT Algorithm Using Distributed Arithmetic | Swapan Kumar Samaddar (u. a.) | Taschenbuch | 136 S. | Englisch | 2013 | LAP LAMBERT Academic Publishing | EAN 9783659377815 | Verantwortliche Person für die EU: BoD - Books on Demand, In de Tarpen 42, 22848 Norderstedt, info[at]bod[dot]de | Anbieter: preigu. Nº de ref. del artículo: 105922455
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