Advanced Logic Synthesis - Tapa dura

Acerca del autor

André Inácio Reis is a Professor at the Institute of Informatics, UFRGS, Brazil, since 2000. He is a senior member of IEEE and ACM, and co-authored more than 200 academic papers and 10 granted USA patents. He received best paper awards from IFIP VLSI 1997, SBCCI 2013 and IWLS 2015. Prof. Andre Reis is actively involved with the organization of ACM/IEEE IWLS. Andre Reis is an advisor for Nangate Inc since 2005, and coordinated cooperation directly between UFRGS and Nangate, as well as among Nangate, UFRGS and six other partners during the European FP7 project Synaptic. The primary research interest of Andre Reis is EDA, focusing on design flow convergence, general purpose optimization (SAT, SMT, ILP), and scalability for large designs (through parallelism and EDA 3.0). Additional interests include technical writing of articles, patents, and intellectual property legal aspects. Prof. Andre Reis wrote more than 500 poems and received awards for poetry writing.

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De la contraportada

This book provides a single-source reference to the state-of-the-art in logic synthesis. Readers will benefit from the authors expert perspectives on new technologies and logic synthesis, new data structures, big data and logic synthesis, and convergent logic synthesis. The authors describe techniques that will enable readers to take advantage of recent advances in big data techniques and frameworks in order to have better logic synthesis algorithms.

• Describes how to map logic into new post-CMOS technologies and devices;
  
• Explains how to use different types of internal data structures, such as Majority-Inverter-Graphs;
  
• Discusses how to mix logic synthesis and physical design in order to have more effective and convergent ways to perform logic synthesis integrated in a complete flow.