Analog Integrated Circuit Design Automation: Placement, Routing and Parasitic Extraction Techniques - Tapa dura

Horta, Nuno; Lourenço, Nuno; Martins, Ricardo

 
9783319340593: Analog Integrated Circuit Design Automation: Placement, Routing and Parasitic Extraction Techniques
Tapa dura
ISBN 10: 331934059X ISBN 13: 9783319340593
Editorial: Springer, 2016

Sinopsis

This book introduces readers to a variety of tools for analog layout design automation. After discussing the placement and routing problem in electronic design automation (EDA), the authors overview a variety of automatic layout generation tools, as well as the most recent advances in analog layout-aware circuit sizing. The discussion includes different methods for automatic placement (a template-based Placer and an optimization-based Placer), a fully-automatic Router and an empirical-based Parasitic Extractor. The concepts and algorithms of all the modules are thoroughly described, enabling readers to reproduce the methodologies, improve the quality of their designs, or use them as starting point for a new tool. All the methods described are applied to practical examples for a 130nm design process, as well as placement and routing benchmark sets.

"Sinopsis" puede pertenecer a otra edición de este libro.

Acerca del autor

Ricardo Martins is a Ph.D candidate in the Integrated Circuits group, within the Instituto de Telecomunicações in Lisbon, Portugal.

Nuno Lourenço is a Post-Doctoral Researcher in the Integrated Circuits group, within the Instituto de Telecomunicações in Lisbon, Portugal.

Nuno Horta is Assistant Professor and Senior Researcher in the Integrated Circuits group, within the Instituto de Telecomunicações in Lisbon, Portugal.

De la contraportada

This book introduces readers to a variety of tools for analog layout design automation. After discussing the placement and routing problem in electronic design automation (EDA), the authors overview a variety of automatic layout generation tools, as well as the most recent advances in analog layout-aware circuit sizing. The discussion includes different methods for automatic placement (a template-based Placer and an optimization-based Placer), a fully-automatic Router and an empirical-based Parasitic Extractor. The concepts and algorithms of all the modules are thoroughly described, enabling readers to reproduce the methodologies, improve the quality of their designs, or use them as starting point for a new tool. All the methods described are applied to practical examples for a 130nm design process, as well as placement and routing benchmark sets.

  • Introduces readers to hierarchical combination of Pareto fronts of placements;
  • Presents electromigration-aware routing with multilayer multiport terminal structures;
  • Includes evolutionary multi-objective multi-constraint detailed Router;
  • Enables parasitic extraction performed over a semi-complete layout.

"Sobre este título" puede pertenecer a otra edición de este libro.

Editorial
Springer
Año de publicación
2016
Idioma
Inglés
ISBN 10 
331934059X
ISBN 13 
9783319340593
Encuadernación
Tapa dura
Número de edición
1
Número de páginas
224
Contacto del fabricante
no disponible
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CMN Printpool Inh. Mathis Neumann
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Hamburg
Alemania

Otras ediciones populares con el mismo título

9783319816685: Analog Integrated Circuit Design Automation: Placement, Routing and Parasitic Extraction Techniques

Edición Destacada

ISBN 10:  3319816683 ISBN 13:  9783319816685
Editorial: Springer, 2018
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