Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs - Tapa dura

Noia, Brandon; Chakrabarty, Krishnendu

 
9783319023779: Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs
Tapa dura
ISBN 10: 3319023772 ISBN 13: 9783319023779
Editorial: Springer, 2013

Sinopsis

This book describes innovative techniques to address the testing needs of 3D stacked integrated circuits (ICs) that utilize through-silicon-vias (TSVs) as vertical interconnects. The authors identify the key challenges facing 3D IC testing and present results that have emerged from cutting-edge research in this domain. Coverage includes topics ranging from die-level wrappers, self-test circuits, and TSV probing to test-architecture design, test scheduling, and optimization. Readers will benefit from an in-depth look at test-technology solutions that are needed to make 3D ICs a reality and commercially viable.

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Acerca del autor

Krishnendu Chakrabarty is a Professor of Electrical and Computer Engineering at Duke University. He received his PhD from University of Michigan. He is a Fellow of IEEE and a Distinguished Engineer of ACM.

De la contraportada


This book describes innovative techniques to address the testing needs of 3D stacked integrated circuits (ICs) that utilize through-silicon-vias (TSVs) as vertical interconnects. The authors identify the key challenges facing 3D IC testing and present results that have emerged from cutting-edge research in this domain. Coverage includes topics ranging from die-level wrappers, self-test circuits, and TSV probing to test-architecture design, test scheduling, and optimization. Readers will benefit from an in-depth look at test-technology solutions that are needed to make 3D ICs a reality and commercially viable.

• Provides a comprehensive guide to the challenges and solutions for the testing of TSV-based 3D stacked ICs;
• Includes in-depth explanation of key test and design-for-test technologies, emerging standards, and test- architecture and test-schedule optimizations;
• Encompasses all aspects of test as related to 3D ICs, including pre-bond and post-bond test as well as the test optimization and scheduling necessary to ensure that 3D testing remains cost-effective.

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Editorial
Springer
Año de publicación
2013
Idioma
Inglés
ISBN 10 
3319023772
ISBN 13 
9783319023779
Encuadernación
Tapa dura
Número de páginas
264
Contacto del fabricante
no disponible
Persona responsable
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Alemania

Otras ediciones populares con el mismo título

9783319345345: Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs

Edición Destacada

ISBN 10:  3319345346 ISBN 13:  9783319345345
Editorial: Springer, 2016
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