Modern Programmable Interconnect Design - Tapa dura

Acerca del autor

Stefan Nikolić is an Assistant Professor at the Department of Mathematics and Informatics, Faculty of Sciences, University of Novi Sad, Serbia. Previously, he was a research assistant and PhD student at EPFL, Lausanne, Switzerland, conducting research at the Processor Architecture Laboratory, under the supervision of Prof. Paolo Ienne. In 2023, he was awarded the EDIC Patrick Denantes Memorial Prize, for the best thesis defended at the School of Computer and Communication Sciences of EPFL in the given year, while in 2024 he received one of the EDAA Outstanding Dissertation Awards. In 2021 and 2022, Stefan also conducted research as part of the FPGA architecture team of Xilinx Inc. (now AMD), under the supervision of Chirag Ravishankar and Dr. Dinesh Gaitonde. In 2020 and 2021, he received the Michal Servit Best Paper Award at FPL, for work in the domain of FPGA architecture and CAD, which still constitute his primary areas of interest. Stefan also holds a BSc with honors degree in Electrical and Computer Engineering from the University of Novi Sad, which he obtained in 2017.

De la contraportada

This book thoroughly analyzes the fundamental problem of programmable interconnect design in FPGAs. Recent changes in fabrication technology have caused a renewed interest in this problem that was formerly considered largely solved. Besides presenting some of the most recent research results directed towards resolving the difficulties of programmable interconnect design in scaled technologies, the author also gives a modern introduction to programmable interconnect design in general, covering related topics such as broader FPGA architecture, CAD, and Networks on Chip, enabling practitioners from other fields to understand the significance and implications of this important problem.

• Introduces a new physical modeling framework to capture the effects of resistance scaling at advanced technology nodes;
• Presents several new algorithms that allow effective automation of programmable interconnect design;
• Enables diverse readers to understand FPGA architecture and CAD, and in particular programmable interconnect design.