In-Memory Computing Hardware Accelerators for Data-Intensive Applications - Tapa blanda

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Baker Mohammad is the director of System on Chip center and professor of EECS at Khalifa University. Dr. Mohammad is a senior member of IEEE and a member of the Mohammed bin Rashid Academy of Scientists. Prior to joining Khalifa University, he was a Senior Staff Engineer/Manager at Qualcomm, Austin, Tx, USA, for 6-years, where he was engaged in designing high-performance and low-power DSP processors used for communication and multi-media application. Before joining Qualcomm, he worked for 10 years at Intel Corporation on a wide range of microprocessors design from high-performance, server chips > 100Watt (IA-64), to mobile embedded processor low power sub 1 watt (xscale). He has over 16 years of industrial experience in microprocessor design, emphasizing memory, low power circuit, and physical design. Baker earned his Ph.D. from the University of Texas at Austin in 2008, his M.S. degree from Arizona State University, Tempe, and BS degree from the University of New Mexico, Albuquerque, all in ECE. His research interests include VLSI, power-efficient computing, embedded memory and in-memory computing, neuromorphic computing, emerging technology such as Memristor, STTRAM, hardware accelerators for Cyber-Physical Systems and AI. He is also engaged in a microwatt range computing platform for wearable electronics and WSN focusing on energy harvesting, power management, and power conversion, including efficient dc/dc, ac/dc converters. Baker authored/co-authored over 200 referred journals and conference proceedings, >3 books, >18 US patents, multiple invited seminars/panelists, and the presenter of >3 conference tutorials, including one tutorial on Energy harvesting and Power management for WSN at the 2015 (ISCAS). Baker is an associate editor for IEEE Access, IEEE Transaction on VLSI (TVLSI), and Scientific Reports journals. Dr Mohammad participates in many technical committees at IEEE conferences and reviews for TVLSI, IEEE Circuits and Systems journals. He has received several awards, including the KUSTAR staff excellence award in intellectual property creation, IEEE TVLSI best paper award, 2016 IEEE MWSCAS Myrill B. Reed best paper award, Qualcomm Qstar award for excellence on performance and leadership. SRC Techon best session papers for 2016 and 2017. 2009 Best paper award for Qualcomm Qtech conference and Intel Involve in the community award for volunteer and impact on the community.

Yasmin Halawani is a Postdoctoral Fellow at Khalifa University in Abu Dhabi, UAE.

De la contraportada

This book describes the state-of-the-art of technology and research on In-Memory Computing Hardware Accelerators for Data-Intensive Applications. The authors discuss how processing-centric computing has become insufficient to meet target requirements and how Memory-centric computing may be better suited for the needs of current applications. This reveals for readers how current and emerging memory technologies are causing a shift in the computing paradigm. The authors do deep-dive discussions on volatile and non-volatile memory technologies, covering their basic memory cell structures, operations, different computational memory designs and the challenges associated with them. Specific case studies and potential applications are provided along with their current status and commercial availability in the market.

• Explains how traditional computer architecture limits data movements (memory wall) and the associated impacts;
• Discusses computing paradigms such as In-Memory or near-memory computing for emerging applications such as AI;
• Uses case studies to explain the tradeoff between accuracy, computing complexity, and latency.